MIPI DSI Interface

Detailed Description

Interface for MIPI DSI communications.

Summary

The MIPI DSI interface provides functionality involved with driving display panels over MIPI.

Data Structures
struct	mipi_dsi_cmd_t
union	mipi_dsi_ack_err_status_t
struct	mipi_dsi_status_t
struct	mipi_dsi_callback_args_t
struct	mipi_dsi_timing_t
struct	mipi_dsi_cfg_t
struct	mipi_dsi_api_t
struct	mipi_dsi_instance_t

Typedefs
typedef __PACKED_STRUCT	st_mipi_dsi_result
	Data of received packet header. More...
typedef void	mipi_dsi_ctrl_t

Enumerations
enum	mipi_dsi_cmd_id_t
enum	mipi_dsi_dcs_id_t
enum	mipi_dsi_video_data_t
enum	mipi_dsi_ack_err_t
enum	mipi_dsi_vc_t
enum	mipi_dsi_cmd_flag_t
enum	mipi_dsi_event_t
enum	mipi_dsi_sequence_status_t
enum	mipi_dsi_video_status_t
enum	mipi_dsi_receive_status_t
enum	mipi_dsi_fatal_status_t
enum	mipi_dsi_phy_status_t
enum	mipi_dsi_link_status_t
enum	mipi_dsi_lane_t

Variables
mipi_dsi_cmd_id_t	cmd_id
	Data type.
uint8_t	virtual_channel_id
	Virtual channel ID.
uint8_t	long_packet
	Sort packet (0) or Long packet (1)
uint8_t	rx_success
	Response packet or ack trigger received.
uint8_t	timeout
	Fatal timeout error.
uint8_t	rx_fail
	Expected receive not done.
uint8_t	rx_data_fail
	Receive packet data fail.
uint8_t	rx_correctable_error
	Correctable error detected.
uint8_t	rx_ack_err
	Rx acknowledge and error report packet received.
uint8_t	info_overwrite
	This information was overwritten.

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Data Structure Documentation

mipi_dsi_cmd_t

struct mipi_dsi_cmd_t

MIPI DSI Command

Data Fields
uint8_t	channel	Virtual Channel ID.
mipi_dsi_cmd_id_t	cmd_id	Message ID.
mipi_dsi_cmd_flag_t	flags	Flags controlling this message transition.
uint16_t	tx_len	Transmit buffer size.
const uint8_t *	p_tx_buffer	Transmit buffer pointer.
const uint8_t *	p_rx_buffer	Receive buffer pointer.

mipi_dsi_ack_err_status_t

union mipi_dsi_ack_err_status_t

MIPI DSI Acknowledge and Error status type

Data Fields
	__PACKED_STRUCT	Error report bits.
mipi_dsi_vc_t	virtual_channel: 4	Virtual Channel ID.
uint32_t	__pad0__: 12
uint32_t	bits

mipi_dsi_status_t

struct mipi_dsi_status_t

MIPI DSI status type

Data Fields
mipi_dsi_link_status_t	link_status	Link status.
mipi_dsi_ack_err_status_t	ack_err_latest	Latest Acknowledge and Error Report Packet Latest Info.
mipi_dsi_ack_err_status_t	ack_err_accumulated	Accumulated Acknowledge and Error Report Packet Latest Info.

mipi_dsi_callback_args_t

struct mipi_dsi_callback_args_t

MIPI DSI callback parameter definition

Data Fields
mipi_dsi_event_t	event	Event code.
union mipi_dsi_callback_args_t	__unnamed__
mipi_dsi_receive_result_t *	p_result	Receive result pointer.
void const *	p_context	Context provided to user during callback.

mipi_dsi_timing_t

struct mipi_dsi_timing_t

MIPI DSI transition timing

Data Fields
uint32_t	clock_stop_time	Clock stop time.
uint32_t	clock_beforehand_time	Clock beforehand time.
uint32_t	clock_keep_time	Clock Keep time.
uint32_t	go_lp_and_back	Go LP and Back time.

mipi_dsi_cfg_t

struct mipi_dsi_cfg_t

MIPI DSI main configuration structure

Data Fields
mipi_phy_instance_t const *	p_mipi_phy_instance
	Pointer to mipi physical layer instance.
mipi_dsi_timing_t const *	p_timing
	Pointer to MIPI DSI timing configuration.
bool	hsa_no_lp
	Suppress the transition to LP during HSA period and keep HS.
bool	hbp_no_lp
	Suppress the transition to LP during HBP period and keep HS.
bool	hfp_no_lp
	Suppress the transition to LP during HFP period and keep HS.
uint8_t	num_lanes
	Number of MIPI lanes to use.
uint8_t	ulps_wakeup_period
	ULPS wakeup period.
uint8_t	continuous_clock
	Always run HS clock on/off.
uint32_t	hs_tx_timeout
	HS-Tx Timeout value.
uint32_t	lp_rx_timeout
	LP-Rx host processor timeout.
uint32_t	turnaround_timeout
	Turnaround Acknowledge Timeout.
uint32_t	bta_timeout
	Peripheral Response Timeout.
uint32_t	lprw_timeout
	LP Read and Write Timeouts.
uint32_t	hsrw_timeout
	HS Read and Write Timeouts.
uint32_t	max_return_packet_size
	Maximum return packet size.
bool	ecc_enable
	ECC Check enable.
mipi_dsi_vc_t	crc_check_mask
	Virtual channel CRC check enable.
bool	scramble_enable
	Scramble on/off.
bool	tearing_detect
	External tearing effect detection mode (0:rising, 1:falling edge)
bool	eotp_enable
	End of Transmit Packet (EoTP) on/off.
bool	sync_pulse
	Enable for Non-Burst Mode with Sync Pulse sequence.
mipi_dsi_video_data_t	data_type
	Video mode data type: 16-bit RGB, 18-bit RGB, 24-bit RGB.
uint8_t	virtual_channel_id
	Video mode virtual channel to use (from 0x0 to 0x3)
uint32_t	vertical_sync_lines
	Number of vertical sync active lines.
bool	vertical_sync_polarity
	V-Sync Polarity.
uint32_t	vertical_active_lines
	Number of vertical active lines.
uint32_t	vertical_back_porch
	Vertical back porch.
uint32_t	vertical_front_porch
	Vertical front porch.
uint32_t	horizontal_sync_lines
	Number of horizontal sync active lines.
bool	horizontal_sync_polarity
	H-Sync Polarity.
uint32_t	horizontal_active_lines
	Number of horizontal active lines.
uint32_t	horizontal_back_porch
	Horizontal back porch.
uint32_t	horizontal_front_porch
	Horizontal front porch.
void(*	p_callback )(mipi_dsi_callback_args_t *p_args)
	Pointer to callback function. More...
void const *	p_context
	User defined context passed into callback function.
void const *	p_extend
	MIPI hardware dependent configuration. More...

Field Documentation

p_callback

void(* mipi_dsi_cfg_t::p_callback) (mipi_dsi_callback_args_t *p_args)

Pointer to callback function.

Callback configuration

p_extend

void const* mipi_dsi_cfg_t::p_extend

MIPI hardware dependent configuration.

Pointer to display peripheral specific configuration

mipi_dsi_api_t

struct mipi_dsi_api_t

Shared Interface definition for MIPI DSI peripheral

Data Fields
fsp_err_t(*	open )(mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_cfg_t const *const p_cfg)
fsp_err_t(*	close )(mipi_dsi_ctrl_t *const p_ctrl)
fsp_err_t(*	start )(mipi_dsi_ctrl_t *const p_ctrl)
fsp_err_t(*	stop )(mipi_dsi_ctrl_t *const p_ctrl)
fsp_err_t(*	ulpsEnter )(mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_lane_t lane)
fsp_err_t(*	ulpsExit )(mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_lane_t lane)
fsp_err_t(*	command )(mipi_dsi_ctrl_t *const p_api_ctrl, mipi_dsi_cmd_t *p_cmd)
fsp_err_t(*	statusGet )(mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_status_t *p_status)

Field Documentation

open

fsp_err_t(* mipi_dsi_api_t::open) (mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_cfg_t const *const p_cfg)

Open MIPI DSI device.

Parameters

[in,out]	p_ctrl	Pointer to MIPI DSI interface control block. Must be declared by user. Value set here.
[in]	p_cfg	Pointer to MIPI DSI configuration structure. All elements of this structure must be set by user.

close

fsp_err_t(* mipi_dsi_api_t::close) (mipi_dsi_ctrl_t *const p_ctrl)

Close MIPI DSI device.

Parameters

[in]

p_ctrl

Pointer to MIPI DSI interface control block.

start

fsp_err_t(* mipi_dsi_api_t::start) (mipi_dsi_ctrl_t *const p_ctrl)

Start pixel data output.

Parameters

[in]

p_ctrl

Pointer to MIPI DSI interface control block.

stop

fsp_err_t(* mipi_dsi_api_t::stop) (mipi_dsi_ctrl_t *const p_ctrl)

Stop pixel data output.

Parameters

[in]

p_ctrl

Pointer to MIPI DSI interface control block.

ulpsEnter

fsp_err_t(* mipi_dsi_api_t::ulpsEnter) (mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_lane_t lane)

Enter Ultra-low Power State (ULPS).

Parameters

[in]	p_ctrl	Pointer to MIPI DSI interface control block.
[in]	lane	Physical lane(s) to transition into ULPS

ulpsExit

fsp_err_t(* mipi_dsi_api_t::ulpsExit) (mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_lane_t lane)

Exit Ultra-low Power State (ULPS).

Parameters

[in]	p_ctrl	Pointer to MIPI DSI interface control block.
[in]	lane	Physical lane(s) to transition from ULPS

command

fsp_err_t(* mipi_dsi_api_t::command) (mipi_dsi_ctrl_t *const p_api_ctrl, mipi_dsi_cmd_t *p_cmd)

Send a command to the display.

Parameters

[in]	p_ctrl	Pointer to MIPI DSI interface control block.
[in]	p_cmd	Pointer to a command structure

statusGet

fsp_err_t(* mipi_dsi_api_t::statusGet) (mipi_dsi_ctrl_t *const p_ctrl, mipi_dsi_status_t *p_status)

Get status of MIPI link.

Parameters

[in]	p_ctrl	Pointer to MIPI DSI interface control block.
[in]	p_status	Pointer to MIPI DSI interface status structure.

mipi_dsi_instance_t

struct mipi_dsi_instance_t

This structure encompasses everything that is needed to use an instance of this interface.

Data Fields
mipi_dsi_ctrl_t *	p_ctrl	Pointer to the control structure for this instance.
mipi_dsi_cfg_t const *	p_cfg	Pointer to the configuration structure for this instance.
mipi_dsi_api_t const *	p_api	Pointer to the API structure for this instance.

Typedef Documentation

st_mipi_dsi_result

typedef __PACKED_STRUCT st_mipi_dsi_result

Data of received packet header.

MIPI DSI Result

mipi_dsi_ctrl_t

typedef void mipi_dsi_ctrl_t

MIPI DSI control block. Allocate an instance specific control block to pass into the MIPI DSI API calls.

Enumeration Type Documentation

mipi_dsi_cmd_id_t

enum mipi_dsi_cmd_id_t

MIPI DSI packet Data Type (commands) - See MIPI specification for additional information

Enumerator
MIPI_DSI_CMD_ID_V_SYNC_START	(Short) Sync Event, V Sync Start
MIPI_DSI_CMD_ID_V_SYNC_END	(Short) Sync Event, V Sync End
MIPI_DSI_CMD_ID_H_SYNC_START	(Short) Sync Event, H Sync Start
MIPI_DSI_CMD_ID_H_SYNC_END	(Short) Sync Event, H Sync End
MIPI_DSI_CMD_ID_COMPRESSION_MODE	(Short) Compression Mode Command
MIPI_DSI_CMD_ID_END_OF_TRANSMISSION	(Short) End of Transmission packet (EoTp)
MIPI_DSI_CMD_ID_COLOR_MODE_OFF	(Short) Color Mode (CM) Off Command
MIPI_DSI_CMD_ID_COLOR_MODE_ON	(Short) Color Mode (CM) On Command
MIPI_DSI_CMD_ID_SHUTDOWN_PERIPHERAL	(Short) Shut Down Peripheral Command
MIPI_DSI_CMD_ID_TURN_ON_PERIPHERAL	(Short) Turn On Peripheral Command
MIPI_DSI_CMD_ID_GENERIC_SHORT_WRITE_0_PARAM	(Short) Generic Short WRITE, no parameters
MIPI_DSI_CMD_ID_GENERIC_SHORT_WRITE_1_PARAM	(Short) Generic Short WRITE, 1 parameter
MIPI_DSI_CMD_ID_GENERIC_SHORT_WRITE_2_PARAM	(Short) Generic Short WRITE, 2 parameters
MIPI_DSI_CMD_ID_GENERIC_READ_REQUEST_0_PARAM	(Short) Generic READ, no parameters
MIPI_DSI_CMD_ID_GENERIC_READ_REQUEST_1_PARAM	(Short) Generic READ, 1 parameter
MIPI_DSI_CMD_ID_GENERIC_READ_REQUEST_2_PARAM	(Short) Generic READ, 2 parameters
MIPI_DSI_CMD_ID_DCS_SHORT_WRITE_0_PARAM	(Short) DCS Short WRITE, no parameters
MIPI_DSI_CMD_ID_DCS_SHORT_WRITE_1_PARAM	(Short) DCS Short WRITE, 1 parameter
MIPI_DSI_CMD_ID_DCS_READ	(Short) DCS READ, no parameters
MIPI_DSI_CMD_ID_EXECUTE_QUEUE	(Short) Execute Queue
MIPI_DSI_CMD_ID_SET_MAXIMUM_RETURN_PACKET_SIZE	(Short) Set Maximum Return Packet Size
MIPI_DSI_CMD_ID_NULL_PACKET	(Long) Null Packet, no data
MIPI_DSI_CMD_ID_BLANKING_PACKET	(Long) Blanking Packet, no data
MIPI_DSI_CMD_ID_GENERIC_LONG_WRITE	(Long) Generic Long Write
MIPI_DSI_CMD_ID_DCS_LONG_WRITE	(Long) DCS Long Write/write_LUT Command Packet
MIPI_DSI_CMD_ID_PICTURE_PARAMETER_SET	(Long) Picture Parameter Set
MIPI_DSI_CMD_ID_COMPRESSED_PIXEL_STREAM	(Long) Compressed Pixel Stream
MIPI_DSI_CMD_ID_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	(Long) Loosely Packed Pixel Stream, 20-bit YCbCr, 4:2:2 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_YCBCR24	(Long) Packed Pixel Stream, 24-bit YCbCr, 4:2:2 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_YCBCR16	(Long) Packed Pixel Stream, 16-bit YCbCr, 4:2:2 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_30	(Long) Packed Pixel Stream, 30-bit RGB, 10-10-10 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_36	(Long) Packed Pixel Stream, 36-bit RGB, 12-12-12 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_YCBCR12	(Long) Packed Pixel Stream, 12-bit YCbCr, 4:2:0 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_16	(Long) Packed Pixel Stream, 16-bit RGB, 5-6-5 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_18	(Long) Packed Pixel Stream, 18-bit RGB, 6-6-6 Format
MIPI_DSI_CMD_ID_LOOSELY_PACKED_PIXEL_STREAM_18	(Long) Loosely Packed Pixel Stream, 18-bit RGB, 6-6-6 Format
MIPI_DSI_CMD_ID_PACKED_PIXEL_STREAM_24	(Long) Packed Pixel Stream, 24-bit RGB, 8-8-8 Format

mipi_dsi_dcs_id_t

enum mipi_dsi_dcs_id_t

MIPI DCS ID types - See MIPI DCS specification for additional information

Enumerator
MIPI_DSI_DCS_ID_ENTER_IDLE_MODE	Enter idle mode.
MIPI_DSI_DCS_ID_ENTER_INVERT_MODE	Displayed image colors inverted.
MIPI_DSI_DCS_ID_ENTER_NORMAL_MODE	Whole display area used for image.
MIPI_DSI_DCS_ID_ENTER_PARTIAL_MODE	Part of display area used for image.
MIPI_DSI_DCS_ID_ENTER_SLEEP_MODE	Power off the display panel.
MIPI_DSI_DCS_ID_EXIT_IDLE_MODE	Full color depth used.
MIPI_DSI_DCS_ID_EXIT_INVERT_MODE	Displayed image colors not inverted.
MIPI_DSI_DCS_ID_EXIT_SLEEP_MODE	Power on the display panel.
MIPI_DSI_DCS_ID_GET_3D_CONTROL	Get display module 3D mode.
MIPI_DSI_DCS_ID_GET_ADDRESS_MODE	Get data order for transfers from host to the display device.
MIPI_DSI_DCS_ID_GET_BLUE_CHANNEL	Get blue component of pixel at 0,0.
MIPI_DSI_DCS_ID_GET_CABC_MIN_BRIGHTNESS	Get current minimum brightness level of the active CABC mode.
MIPI_DSI_DCS_ID_GET_COMPRESSION_MODE	Get current compression mode.
MIPI_DSI_DCS_ID_GET_CONTROL_DISPLAY	Get control display mode.
MIPI_DSI_DCS_ID_GET_DIAGNOSTIC_RESULT	Get peripheral self-diagnostic result.
MIPI_DSI_DCS_ID_GET_DISPLAY_BRIGHTNESS	Get current display brightness level.
MIPI_DSI_DCS_ID_GET_DISPLAY_MODE	Get current display mode from the peripheral.
MIPI_DSI_DCS_ID_GET_DSI_MODE	Get DSI operation mode.
MIPI_DSI_DCS_ID_GET_ERROR_COUNT_ON_DSI	Get number of corrupted packets on DSI.
MIPI_DSI_DCS_ID_GET_GREEN_CHANNEL	Get green component of pixel at 0,0.
MIPI_DSI_DCS_ID_GET_IMAGE_CHECKSUM_CT	Returns checksum of frame of color-transformed pixel data.
MIPI_DSI_DCS_ID_GET_IMAGE_CHECKSUM_RGB	Returns checksum of frame of RGB pixel data.
MIPI_DSI_DCS_ID_GET_PIXEL_FORMAT	Get current pixel format.
MIPI_DSI_DCS_ID_GET_POWER_MODE	Get current power mode.
MIPI_DSI_DCS_ID_GET_POWER_SAVE	Get current power-save mode.
MIPI_DSI_DCS_ID_GET_RED_CHANNEL	Get red component of pixel at 0,0.
MIPI_DSI_DCS_ID_GET_SCANLINE	Get current scanline.
MIPI_DSI_DCS_ID_GET_SIGNAL_MODE	Get display module signaling mode.
MIPI_DSI_DCS_ID_NOP	No operation.
MIPI_DSI_DCS_ID_READ_ACMD	Perform read access to the ACMD registers.
MIPI_DSI_DCS_ID_READ_DDB_CONTINUE	Continue reading the DDB from the last read location.
MIPI_DSI_DCS_ID_READ_DDB_START	Read the DDB from the provided location.
MIPI_DSI_DCS_ID_READ_DSE_MAILBOX	Read access to the registers of the DSE read or write control mailbox.
MIPI_DSI_DCS_ID_READ_MEMORY_CONTINUE	Read image data from peripheral, continuing after last read.
MIPI_DSI_DCS_ID_READ_MEMORY_START	Read image data from the peripheral to the host.
MIPI_DSI_DCS_ID_READ_PPS_CONTINUE	Continue reading the specified length of PPS data.
MIPI_DSI_DCS_ID_READ_PPS_START	Read PPS data.
MIPI_DSI_DCS_ID_SET_3D_CONTROL	3D is used on the display panel
MIPI_DSI_DCS_ID_SET_ADDRESS_MODE	Set data order for transfers from host to peripheral.
MIPI_DSI_DCS_ID_SET_ARP_OFF	Disable ARP.
MIPI_DSI_DCS_ID_SET_ARP_ON	Enable ARP and set T2 timer.
MIPI_DSI_DCS_ID_SET_CABC_MIN_BRIGHTNESS	Set minimum brightness level for CABC mode.
MIPI_DSI_DCS_ID_SET_COLUMN_ADDRESS	Set column extent.
MIPI_DSI_DCS_ID_SET_DISPLAY_BRIGHTNESS	Set display brightness level.
MIPI_DSI_DCS_ID_SET_DISPLAY_OFF	Blank the display device.
MIPI_DSI_DCS_ID_SET_DISPLAY_ON	Show image on display device.
MIPI_DSI_DCS_ID_SET_DSI_MODE	Set DSI operation mode.
MIPI_DSI_DCS_ID_SET_GAMMA_CURVE	Select gamma curve used by display.
MIPI_DSI_DCS_ID_SET_PAGE_ADDRESS	Set page extent.
MIPI_DSI_DCS_ID_SET_PARTIAL_COLUMNS	Define the number of columns in the partial display area.
MIPI_DSI_DCS_ID_SET_PARTIAL_ROWS	Define the number of rows in the partial display area.
MIPI_DSI_DCS_ID_SET_PIXEL_FORMAT	Define how many bits per pixel are used.
MIPI_DSI_DCS_ID_SET_SCROLL_AREA	Define vertical scrolling and fixed area.
MIPI_DSI_DCS_ID_SET_SCROLL_START	Define vertical scrolling starting point.
MIPI_DSI_DCS_ID_SET_TEAR_OFF	Sync information not sent from the display module to the host.
MIPI_DSI_DCS_ID_SET_TEAR_ON	Sync information is sent from the display module to the host.
MIPI_DSI_DCS_ID_SET_TEAR_SCANLINE	Sync information is sent from display to the host when display refresh reaches profivided scan line.
MIPI_DSI_DCS_ID_SET_VSYNC_TIMING	Set VSYNC timing to the specified length of PPS data.
MIPI_DSI_DCS_ID_SOFT_RESET	Software reset.
MIPI_DSI_DCS_ID_WRITE_ACMD	Write access to ACMD registers.
MIPI_DSI_DCS_ID_WRITE_CONTROL_DISPLAY	Write control mode of display brightness.
MIPI_DSI_DCS_ID_WRITE_DSE_MAILBOX	Write registers of DSE read or write control mailbox.
MIPI_DSI_DCS_ID_WRITE_LUT	Fill peripheral look-up table with provided data.
MIPI_DSI_DCS_ID_WRITE_MEMORY_CONTINUE	Continue image information transfer from last address.
MIPI_DSI_DCS_ID_WRITE_MEMORY_START	Transfer image information from host to peripheral.
MIPI_DSI_DCS_ID_WRITE_POWER_SAVE	Writes power save mode.

mipi_dsi_video_data_t

enum mipi_dsi_video_data_t

MIPI DSI Video Data type

Enumerator
MIPI_DSI_VIDEO_DATA_16RGB_PIXEL_STREAM	16-bit RGB Packed Pixel Stream
MIPI_DSI_VIDEO_DATA_18RGB_PIXEL_STREAM	18-bit RGB Packed Pixel Stream
MIPI_DSI_VIDEO_DATA_18RGB_LOOSELY_PIXEL_STREAM	18-bit RGB Loosely Packed Pixel Stream
MIPI_DSI_VIDEO_DATA_24RGB_PIXEL_STREAM	24-bit RGB Packed Pixel Stream

mipi_dsi_ack_err_t

enum mipi_dsi_ack_err_t

MIPI DSI Acknowledge and Error type

Enumerator
MIPI_DSI_ACK_ERR_NONE	No Errors.
MIPI_DSI_ACK_ERR_SOT_ERROR	SoT Error.
MIPI_DSI_ACK_ERR_SOT_SYNC_ERROR	SoT Sync Error.
MIPI_DSI_ACK_ERR_EOT_SYNC_ERROR	EoT Sync Error.
MIPI_DSI_ACK_ERR_ESCAPE_ENTRY_ERROR	Escape Mode Entry Error.
MIPI_DSI_ACK_ERR_LOW_POWER_SYNC_ERROR	Low-Power Transmit Sync Error.
MIPI_DSI_ACK_ERR_PERIPHERAL_TIMEOUT_ERROR	Peripheral Timeout Error.
MIPI_DSI_ACK_ERR_FALSE_CONTROL_ERROR	False Control Error.
MIPI_DSI_ACK_ERR_CONTENTION_DETECTED	Contention Detected Error.
MIPI_DSI_ACK_ERR_ECC_SINGLE	ECC Error, single-bit.
MIPI_DSI_ACK_ERR_ECC_MULTI	ECC Error, multi-bit.
MIPI_DSI_ACK_ERR_CKSM_ERROR	Checksum Error (Long packet only)
MIPI_DSI_ACK_ERR_DSI_DATA_ERROR	DSI Data Type Not Recognized.
MIPI_DSI_ACK_ERR_DSI_VC_ID_ERROR	DSI VC ID Invalid.
MIPI_DSI_ACK_ERR_INVALID_TX_LEN	Invalid Transmission Length.
MIPI_DSI_ACK_ERR_DSI_PROTOCOL_VIOLATION	DSI Protocol Violation.

mipi_dsi_vc_t

enum mipi_dsi_vc_t

Enumerator
MIPI_DSI_VC_NONE	No channels selected.
MIPI_DSI_VC_0	Virtual channel 0.
MIPI_DSI_VC_1	Virtual channel 1.
MIPI_DSI_VC_2	Virtual channel 2.
MIPI_DSI_VC_3	Virtual channel 3.

mipi_dsi_cmd_flag_t

enum mipi_dsi_cmd_flag_t

MIPI DSI Message Flags

Enumerator
MIPI_DSI_CMD_FLAG_NONE	No flags.
MIPI_DSI_CMD_FLAG_BTA	Assert bus turnaround at end of transfer.
MIPI_DSI_CMD_FLAG_BTA_READ	Assert bus turnaround followed by read request (No WRITE request before BTA)
MIPI_DSI_CMD_FLAG_BTA_NO_WRITE	Immediately assert bus turnaround (No WRITE request before BTA)
MIPI_DSI_CMD_FLAG_AUX_OPERATION	Execute auxiliary operation command.
MIPI_DSI_CMD_FLAG_ACT_CODE_RESET_TRIGGER	Send action code reset trigger message.
MIPI_DSI_CMD_FLAG_ACT_CODE_INITIAL_SKEW_CAL	Send action code initial skew calibration message.
MIPI_DSI_CMD_FLAG_ACT_CODE_PERIODIC_SKEW_CAL	Send action code periodic skew message.
MIPI_DSI_CMD_FLAG_ACT_CODE_NO_OPERATION	Send action code NOOP message.
MIPI_DSI_CMD_FLAG_LOW_POWER	Transmit in low-power mode.

mipi_dsi_event_t

enum mipi_dsi_event_t

MIPI DSI event codes

Enumerator
MIPI_DSI_EVENT_SEQUENCE_0	Sequence 0 event (Low-Power)
MIPI_DSI_EVENT_SEQUENCE_1	Sequence 1 event (High-Speed)
MIPI_DSI_EVENT_VIDEO	Video event.
MIPI_DSI_EVENT_RECEIVE	Receive event.
MIPI_DSI_EVENT_FATAL	Fatal event.
MIPI_DSI_EVENT_PHY	Physical layer event.
MIPI_DSI_EVENT_POST_OPEN	Interface has been opened. Perform post-open application processing.
MIPI_DSI_EVENT_PRE_START	Video is about to start. Perform pre-video application processing.

mipi_dsi_sequence_status_t

enum mipi_dsi_sequence_status_t

MIPI DSI Sequence status

Enumerator
MIPI_DSI_SEQUENCE_STATUS_NONE	Sequence status not set.
MIPI_DSI_SEQUENCE_STATUS_RUNNING	Sequence operation in progress.
MIPI_DSI_SEQUENCE_STATUS_ACTIONS_FINISHED	All descriptor actions finished.
MIPI_DSI_SEQUENCE_STATUS_DESCRIPTORS_FINISHED	All descriptors finished.
MIPI_DSI_SEQUENCE_STATUS_DESCRIPTOR_ABORT	Descriptor abort interrupt.
MIPI_DSI_SEQUENCE_STATUS_SIZE_ERROR	Packet size error.
MIPI_DSI_SEQUENCE_STATUS_TX_INTERNAL_BUS_ERROR	Tx internal bus error.
MIPI_DSI_SEQUENCE_STATUS_RX_FATAL_ERROR	Receive fatal error.
MIPI_DSI_SEQUENCE_STATUS_RX_FAIL	Receive fail.
MIPI_DSI_SEQUENCE_STATUS_RX_PACKET_DATA_FAIL	Receive packet data fail.
MIPI_DSI_SEQUENCE_STATUS_RX_CORRECTABLE_ERROR	Receive correctable error.
MIPI_DSI_SEQUENCE_STATUS_RX_ACK_AND_ERROR	Receive acknowledge and error report.

mipi_dsi_video_status_t

enum mipi_dsi_video_status_t

MIPI DSI video status errors

Enumerator
MIPI_DSI_VIDEO_STATUS_NONE	Video status not set.
MIPI_DSI_VIDEO_STATUS_START	Video started event.
MIPI_DSI_VIDEO_STATUS_STOP	Video stopped event.
MIPI_DSI_VIDEO_STATUS_RUNNING	Video running status.
MIPI_DSI_VIDEO_STATUS_READY	Video ready event.
MIPI_DSI_VIDEO_STATUS_TIMING_ERROR	Video timing error event.
MIPI_DSI_VIDEO_STATUS_UNDERFLOW	Video buffer underflow event.
MIPI_DSI_VIDEO_STATUS_OVERFLOW	Video buffer overflow event.

mipi_dsi_receive_status_t

enum mipi_dsi_receive_status_t

MIPI DSI receive status errors

Enumerator
MIPI_DSI_RECEIVE_STATUS_NONE	Receive status not set.
MIPI_DSI_RECEIVE_STATUS_BTA_REQUEST_END	Receive BTA request end.
MIPI_DSI_RECEIVE_STATUS_LP_RX_HOST_TIMEOUT	Receive low power receive timeout.
MIPI_DSI_RECEIVE_STATUS_BTA_ACK_TIMEOUT	Receive BTA ack timeout.
MIPI_DSI_RECEIVE_STATUS_RESPONSE_PACKET	Receive response.
MIPI_DSI_RECEIVE_STATUS_EOTP	Receive end of transmission packet.
MIPI_DSI_RECEIVE_STATUS_TEARING_TRIGGER	Receive tearing trigger.
MIPI_DSI_RECEIVE_STATUS_ACK_TRIGGER	Receive ack trigger.
MIPI_DSI_RECEIVE_STATUS_TEARING_DETECT	Receive tearing detect.
MIPI_DSI_RECEIVE_STATUS_MALFORM_ERROR	Receive malform error.
MIPI_DSI_RECEIVE_STATUS_ECC_MULTI	Receive ecc multi-bit error.
MIPI_DSI_RECEIVE_STATUS_UNEXPECTED_PACKET	Receive unexpected packet.
MIPI_DSI_RECEIVE_STATUS_WORD_COUNT	Receive word count.
MIPI_DSI_RECEIVE_STATUS_CRC	Receive crc error.
MIPI_DSI_RECEIVE_STATUS_INTERNAL_BUS	Receive internal bus error.
MIPI_DSI_RECEIVE_STATUS_BUFFER_OVERFLOW	Receive buffer overflow.
MIPI_DSI_RECEIVE_STATUS_TIMEOUT	Receive timeout.
MIPI_DSI_RECEIVE_STATUS_NO_RESPONSE	Receive no response.
MIPI_DSI_RECEIVE_STATUS_PACKET_SIZE	Receive packet size error.
MIPI_DSI_RECEIVE_STATUS_ECC_SINGLE	Receive ecc single bit error.
MIPI_DSI_RECEIVE_STATUS_ACK_AND_ERROR	Receive ack and error.

mipi_dsi_fatal_status_t

enum mipi_dsi_fatal_status_t

MIPI DSI fatal status errors

Enumerator
MIPI_DSI_FATAL_STATUS_NONE	Fatal status not set.
MIPI_DSI_FATAL_STATUS_HS_TX_TIMEOUT	Fatal high speed transmit timeout.
MIPI_DSI_FATAL_STATUS_LP_RX_TIMEOUT	Fatal low power receive timeout.
MIPI_DSI_FATAL_STATUS_BTA_ACK_TIMEOUT	Fatal BTA ack timeout.
MIPI_DSI_FATAL_STATUS_ESCAPE_ENTRY_ERROR	Fatal escape mode entry error.
MIPI_DSI_FATAL_STATUS_LPDT_SYNC_ERROR	Fatal low power data transmission synchronization error.
MIPI_DSI_FATAL_STATUS_CTRL_ERROR	Fatal control error.
MIPI_DSI_FATAL_STATUS_LP0_CONTENTION_DETECT	Fatal lane 0 low power contention detect.
MIPI_DSI_FATAL_STATUS_LP1_CONTENTION_DETECT	Fatal lane 1 low power contention detect.
MIPI_DSI_FATAL_STATUS_LP0_CONTENTION	Fatal lane 0 low power contention status.
MIPI_DSI_FATAL_STATUS_LP1_CONTENTION	Fatal lane 1 low power contention status.

mipi_dsi_phy_status_t

enum mipi_dsi_phy_status_t

MIPI DSI physical lane status

Enumerator
MIPI_DSI_PHY_STATUS_NONE	Physical lane status not set.
MIPI_DSI_PHY_STATUS_ULP_NOT_ACTIVE	Physical lane ULP not active.
MIPI_DSI_PHY_STATUS_CLOCK_LANE_STOP	Clock lane in stopped state.
MIPI_DSI_PHY_STATUS_DATA_LANE0_LP_RX	Data lane low power receive mode.
MIPI_DSI_PHY_STATUS_DATA_LANE0_ULP_RX	Data lane ultra low power receive mode.
MIPI_DSI_PHY_STATUS_DATA_LANE0_NOT_ULP	Data lane 0 not in ULP mode.
MIPI_DSI_PHY_STATUS_DATA_LANE1_NOT_ULP	Data lane 1 not in ULP mode.
MIPI_DSI_PHY_STATUS_DATA_LANE2_NOT_ULP	Data lane 2 not in ULP mode.
MIPI_DSI_PHY_STATUS_DATA_LANE3_NOT_ULP	Data lane 3 not in ULP mode.
MIPI_DSI_PHY_STATUS_DATA_LANE0_STOP	Data lane 0 stop state.
MIPI_DSI_PHY_STATUS_DATA_LANE1_STOP	Data lane 1 stop state.
MIPI_DSI_PHY_STATUS_DATA_LANE2_STOP	Data lane 2 stop state.
MIPI_DSI_PHY_STATUS_DATA_LANE3_STOP	Data lane 3 stop state.
MIPI_DSI_PHY_STATUS_DATA_LANE0_RX_TO_TX	Data lane Rx to Tx transition event.
MIPI_DSI_PHY_STATUS_DATA_LANE0_TX_TO_RX	Data lane Tx to Rx transition event.
MIPI_DSI_PHY_STATUS_DATA_LANE0_RX_STATE	Data lane Rx active state.
MIPI_DSI_PHY_STATUS_CLOCK_ULPS_ENTER	Clock lane ULPS enter event.
MIPI_DSI_PHY_STATUS_CLOCK_ULPS_EXIT	Clock lane ULPS exit event.
MIPI_DSI_PHY_STATUS_CLOCK_LP_TO_HS	Clock lane LP to HS transition event.
MIPI_DSI_PHY_STATUS_CLOCK_HS_TO_LP	Clock lane HS to LP transition event.
MIPI_DSI_PHY_STATUS_DATA_LANE_ULPS_ENTER	Data lane ULPS enter event.
MIPI_DSI_PHY_STATUS_DATA_LANE_ULPS_EXIT	Data lane ULPS exit event.

mipi_dsi_link_status_t

enum mipi_dsi_link_status_t

MIPI DSI link status bits

Enumerator
MIPI_DSI_LINK_STATUS_IDLE	Link idle or uninitialized.
MIPI_DSI_LINK_STATUS_CH0_RUNNING	Channel 0 running.
MIPI_DSI_LINK_STATUS_CH1_RUNNING	Channel 1 running.
MIPI_DSI_LINK_STATUS_VIDEO_RUNNING	Video output running.
MIPI_DSI_LINK_STATUS_HP_MODE_BUSY	HP operation busy.
MIPI_DSI_LINK_STATUS_LP_MODE_BUSY	LP operation busy.

mipi_dsi_lane_t

enum mipi_dsi_lane_t

MIPI DSI Lane Type

Enumerator
MIPI_DSI_LANE_CLOCK	Clock Lanes.
MIPI_DSI_LANE_DATA_ALL	All Data Lanes.