RA Flexible Software Package Documentation  Release v5.7.0

 
SDADC Channel Configuration (r_sdadc)

Functions

fsp_err_t R_SDADC_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)
 
fsp_err_t R_SDADC_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_extend)
 
fsp_err_t R_SDADC_InfoGet (adc_ctrl_t *p_ctrl, adc_info_t *p_adc_info)
 
fsp_err_t R_SDADC_ScanStart (adc_ctrl_t *p_ctrl)
 
fsp_err_t R_SDADC_ScanGroupStart (adc_ctrl_t *p_ctrl, adc_group_mask_t group_id)
 
fsp_err_t R_SDADC_ScanStop (adc_ctrl_t *p_ctrl)
 
fsp_err_t R_SDADC_StatusGet (adc_ctrl_t *p_ctrl, adc_status_t *p_status)
 
fsp_err_t R_SDADC_Read (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint16_t *const p_data)
 
fsp_err_t R_SDADC_Read32 (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint32_t *const p_data)
 
fsp_err_t R_SDADC_OffsetSet (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t const offset)
 
fsp_err_t R_SDADC_Calibrate (adc_ctrl_t *const p_ctrl, void const *p_extend)
 
fsp_err_t R_SDADC_Close (adc_ctrl_t *p_ctrl)
 

Detailed Description

Driver for the SDADC24 peripheral on RA MCUs. This module implements the ADC Interface.

Overview

Features

The SDADC module supports the following features:

Selecting an ADC

All RA MCUs have an ADC (r_adc). Only select RA MCUs have an SDADC. When selecting between them, consider these factors. Refer to the hardware manual for details.

ADC SDADC
AvailabilityAvailable on all RA MCUs.Available on select RA MCUs.
ResolutionThe ADC has a maximum resolution of 12, 14, or 16 bits depending on the MCU.The SDADC has a maximum accuracy of 24 bits.
Number of ChannelsThe ADC has more channels than the SDADC.The SDADC 5 channels, one of which is tied to OPAMP0 and OPAMP1.
FrequencyThe ADC sampling time is shorter (more samples per second).The SDADC sampling time is longer (fewer samples per second).
Settling TimeThe ADC does not have a settling time when switching between channels.The SDADC requires a settling time when switching between channels.

Configuration

Build Time Configurations for r_sdadc

The following build time configurations are defined in fsp_cfg/r_sdadc_cfg.h:

ConfigurationOptionsDefaultDescription
Parameter Checking
  • Default (BSP)
  • Enabled
  • Disabled
Default (BSP) If selected code for parameter checking is included in the build.

Configurations for Analog > ADC (r_sdadc)

This module can be added to the Stacks tab via New Stack > Analog > ADC (r_sdadc).

ConfigurationOptionsDefaultDescription
NameName must be a valid C symbolg_adc0 Module name.
Mode
  • Single Scan
  • Continuous Scan
Continuous Scan In single scan mode, all channels are converted once per start trigger, and conversion stops after all enabled channels are scanned. In continuous scan mode, conversion starts after a start trigger, then continues until stopped in software.
Resolution
  • 16 Bit
  • 24 Bit
24 Bit Select 24-bit or 16-bit resolution.
Alignment
  • Right
  • Left
Right Select left or right alignment.
TriggerMCU Specific OptionsSelect conversion start trigger. Conversion can be started in software, or conversion can be started when a hardware event occurs if the hardware event is linked to the SDADC peripheral using the ELC API.
Vref Source
  • Internal
  • External
Internal Vref can be source internally and output on the SBIAS pin, or Vref can be input from VREFI.
Vref Voltage
  • 0.8 V
  • 1.0 V
  • 1.2 V
  • 1.4 V
  • 1.6 V
  • 1.8 V
  • 2.0 V
  • 2.2 V
  • 2.4 V
1.0 V Select Vref voltage. If Vref is input externally, the voltage on VREFI must match the voltage selected within 3%.
CallbackName must be a valid C symbolNULL Enter the name of the callback function to be called when conversion completes or a scan ends.
Conversion End Interrupt PriorityMCU Specific Options[Required] Select the interrupt priority for the conversion end interrupt.
Scan End Interrupt PriorityMCU Specific Options[Optional] Select the interrupt priority for the scan end interrupt.
Calibration End Interrupt PriorityMCU Specific Options[Optional] Select the interrupt priority for the calibration end interrupt.

Configurations for Analog > SDADC Channel Configuration (r_sdadc)

ConfigurationOptionsDefaultDescription
Input
  • Differential
  • Single Ended
Differential Select differential or single-ended input.
Stage 1 Gain
  • 1
  • 2
  • 3
  • 4
  • 8
1 Select the gain for stage 1 of the PGA. Must be 1 for single-ended input.
Stage 2 Gain
  • 1
  • 2
  • 4
  • 8
1 Select the gain for stage 2 of the PGA. Must be 1 for single-ended input.
Oversampling Ratio
  • 64
  • 128
  • 256
  • 512
  • 1024
  • 2048
256 Select the oversampling ratio for the PGA. Must be 256 for single-ended input.
Polarity (Valid for Single-Ended Input Only)
  • Positive
  • Negative
Positive Select positive or negative polarity for single-ended input. VBIAS (1.0 V typical) is connected on the opposite input.
Conversions to Average per Result
  • Do Not Average (Interrupt after Each Conversion)
  • Average 8
  • Average 16
  • Average 32
  • Average 64
Do Not Average (Interrupt after Each Conversion) Select the number of conversions to average for each result. The ADC_EVENT_CONVERSION_END event occurs after each average, or after each individual conversion if averaging is disabled.
Invert (Valid for Negative Single-Ended Input Only)
  • Result Not Inverted
  • Result Inverted
Result Not Inverted Select whether to invert negative single-ended input. When the result is inverted, the lowest measurable voltage gives a result of 0, and the highest measurable voltage gives a result of 2^resolution - 1.
Number of Conversions Per ScanRefer to the RA Configuration tool for available options.1 Number of conversions on this channel before AUTOSCAN moves to the next channel. When all conversions of all channels are complete, the ADC_EVENT_SCAN_END event occurs.

Clock Configuration

The SDADC clock clock is configurable on the clocks tab.

The SDADC clock must be 4 MHz when the SDADC is used.

Pin Configuration

The ANSDnP (n = 0-3) pins are analog input channels that can be used with the SDADC.

Usage Notes

Scan Procedure

In this document, the term "scan" refers to the AUTOSCAN feature of the SDADC, which works as follows:

  1. Conversions are performed on enabled channels in ascending order of channel number. All conversions required for a single channel are completed before the sequencer moves to the next channel.
  2. Conversions are performed at the rate (in Hz) of the SDADC oversampling clock frequency / oversampling ratio (configured per channel). FSP uses the normal mode SDADC oversampling clock frequency.
  3. If averaging is enabled for the channel, the number of conversions to average are performed before each conversion end interrupt occurs.
  4. If the number of conversions for the channel is more than 1, SDADC performs the number of conversions requested. These are performed consecutively. There is a settling time associated with switching channels. Performing all of the requested conversions for each channel at a time avoids this settling time after the first conversion.

    If averaging is enabled for the channel, each averaged result counts as a single conversion.

  5. Continues to the next enabled channel only after completing all conversions requested.
  6. After all enabled channels are scanned, a scan end interrupt occurs. The driver supports single-scan and continuous scan operation modes.
    • Single-scan mode performs one scan per trigger (hardware trigger or software start using R_SDADC_ScanStart).
    • In continuous scan mode, the scan is restarted after each scan completes. A single trigger is required to start continuous operation of the SDADC.

When Interrupts Are Not Enabled

If interrupts are not enabled, the R_SDADC_StatusGet() API can be used to poll the SDADC to determine when the scan has completed. The R_SDADC_Read() API function is used to access the converted SDADC result. This applies to both normal scans and calibration scans.

Calibration

Calibration is required to use the SDADC if any channel is configured for differential mode. Call R_SDADC_Calibrate() after open, and prior to any other function, then wait for a calibration complete event before using the SDADC. R_SDADC_Calibrate() should not be called if all channels are configured for single-ended mode.

Examples

Basic Example

This is a basic example of minimal use of the SDADC in an application.

void sdadc_basic_example (void)
{
fsp_err_t err = FSP_SUCCESS;
/* Initializes the module. */
err = R_SDADC_Open(&g_adc0_ctrl, &g_adc0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
/* Calibrate all differential channels. */
sdadc_calibrate_args_t calibrate_args;
calibrate_args.channel = ADC_CHANNEL_0;
err = R_SDADC_Calibrate(&g_adc0_ctrl, &calibrate_args);
assert(FSP_SUCCESS == err);
/* Wait for calibration to complete. */
adc_status_t status;
{
R_SDADC_StatusGet(&g_adc0_ctrl, &status);
}
/* In software trigger mode, start a scan by calling R_SDADC_ScanStart(). In other modes, enable external
* triggers by calling R_SDADC_ScanStart(). */
(void) R_SDADC_ScanStart(&g_adc0_ctrl);
/* Wait for conversion to complete. */
{
R_SDADC_StatusGet(&g_adc0_ctrl, &status);
}
/* Read converted data. */
uint32_t channel1_conversion_result;
R_SDADC_Read32(&g_adc0_ctrl, ADC_CHANNEL_1, &channel1_conversion_result);
}

Using DTC or DMAC with the SDADC

If desired, the DTC or DMAC can be used to store each conversion result in a circular buffer. An example configuration is below.

/* Example DTC transfer settings to used with SDADC. */
/* The transfer length should match the total number of conversions per scan. This example assumes the SDADC is
* configured to scan channel 1 three times, then channel 2 and channel 4 once, for a total of 5 conversions. */
#define SDADC_EXAMPLE_TRANSFER_LENGTH (5)
uint32_t g_sdadc_example_buffer[SDADC_EXAMPLE_TRANSFER_LENGTH];
{
.transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
.transfer_settings_word_b.repeat_area = TRANSFER_REPEAT_AREA_DESTINATION,
.transfer_settings_word_b.irq = TRANSFER_IRQ_END,
.transfer_settings_word_b.chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
.transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_FIXED,
.transfer_settings_word_b.mode = TRANSFER_MODE_REPEAT,
/* NOTE: The data transferred will contain a 24-bit converted value in bits 23:0. Bit 24 contains a status flag
* indicating if the result overflowed or not. Bits 27:25 contain the channel number + 1. The settings for
* resolution and alignment and ignored when DTC or DMAC is used. */
.transfer_settings_word_b.size = TRANSFER_SIZE_4_BYTE,
/* NOTE: It is strongly recommended to enable averaging on all channels or no channels when using DTC with SDADC
* because the result register is different when averaging is used. If averaging is enabled on all channels,
* set transfer_info_t::p_src to &R_SDADC->ADAR. */
.p_src = (void const *) &R_SDADC0->ADCR,
.p_dest = &g_sdadc_example_buffer[0],
.length = SDADC_EXAMPLE_TRANSFER_LENGTH,
};
void sdadc_dtc_example (void)
{
fsp_err_t err = FSP_SUCCESS;
/* Initializes the module. */
err = R_SDADC_Open(&g_adc0_ctrl, &g_adc0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
/* Calibrate all differential channels. */
sdadc_calibrate_args_t calibrate_args;
calibrate_args.channel = ADC_CHANNEL_0;
err = R_SDADC_Calibrate(&g_adc0_ctrl, &calibrate_args);
assert(FSP_SUCCESS == err);
/* Wait for calibration to complete. */
adc_status_t status;
{
R_SDADC_StatusGet(&g_adc0_ctrl, &status);
}
/* In software trigger mode, start a scan by calling R_SDADC_ScanStart(). In other modes, enable external
* triggers by calling R_SDADC_ScanStart(). */
(void) R_SDADC_ScanStart(&g_adc0_ctrl);
/* After each conversion, the converted data is transferred to the next index in g_sdadc_example_buffer. After
* the entire scan completes, the index in g_sdadc_example_buffer resets. The data in g_sdadc_example_buffer
* is:
* - g_sdadc_example_buffer[0] = SDADC channel 1 conversion 0
* - g_sdadc_example_buffer[1] = SDADC channel 1 conversion 1
* - g_sdadc_example_buffer[2] = SDADC channel 1 conversion 2
* - g_sdadc_example_buffer[3] = SDADC channel 2 conversion 0
* - g_sdadc_example_buffer[4] = SDADC channel 4 conversion 0
*//* At any point in the application after the first scan completes, the most recent data for channel 2 can be read
* from the buffer like this. Shifting removes the unrelated bits in the result register and propagates the sign
* bit so the value can be interpreted as a signed result. This assumes channel 2 is configured in differential
* mode. */
int32_t channel_2_data = (int32_t) (g_sdadc_example_buffer[3] << 8) >> 8;
FSP_PARAMETER_NOT_USED(channel_2_data);
}

Data Structures

struct  sdadc_calibrate_args_t
 
struct  sdadc_channel_cfg_t
 
struct  sdadc_scan_cfg_t
 
struct  sdadc_extended_cfg_t
 
struct  sdadc_instance_ctrl_t
 

Enumerations

enum  sdadc_vref_src_t
 
enum  sdadc_vref_voltage_t
 
enum  sdadc_channel_input_t
 
enum  sdadc_channel_stage_1_gain_t
 
enum  sdadc_channel_stage_2_gain_t
 
enum  sdadc_channel_oversampling_t
 
enum  sdadc_channel_polarity_t
 
enum  sdadc_channel_average_t
 
enum  sdadc_channel_inversion_t
 
enum  sdadc_channel_count_formula_t
 
enum  sdadc_calibration_t
 

Data Structure Documentation

◆ sdadc_calibrate_args_t

struct sdadc_calibrate_args_t

Structure to pass to the adc_api_t::calibrate p_extend argument.

Data Fields
adc_channel_t channel Which channel to calibrate.
sdadc_calibration_t mode Calibration mode.

◆ sdadc_channel_cfg_t

struct sdadc_channel_cfg_t

SDADC per channel configuration.

◆ sdadc_scan_cfg_t

struct sdadc_scan_cfg_t

SDADC active channel configuration

Data Fields
uint32_t scan_mask Channels/bits: bit 0 is ch0; bit 15 is ch15.

◆ sdadc_extended_cfg_t

struct sdadc_extended_cfg_t

SDADC configuration extension. This extension is required and must be provided in adc_cfg_t::p_extend.

Data Fields
uint8_t conv_end_ipl Conversion end interrupt priority.
IRQn_Type conv_end_irq
sdadc_vref_src_t vref_src Source of Vref (internal or external)
sdadc_vref_voltage_t vref_voltage

Voltage of Vref, required for both internal and external Vref. If Vref is from an external source, the voltage must match the specified voltage within 3%.

sdadc_channel_cfg_t const * p_channel_cfgs[SDADC_MAX_NUM_CHANNELS] Configuration for each channel, set to NULL if unused.

◆ sdadc_instance_ctrl_t

struct sdadc_instance_ctrl_t

ADC instance control block. DO NOT INITIALIZE. Initialized in adc_api_t::open().

Enumeration Type Documentation

◆ sdadc_vref_src_t

Source of Vref.

Enumerator
SDADC_VREF_SRC_INTERNAL 

Vref is internally sourced, can be output as SBIAS.

SDADC_VREF_SRC_EXTERNAL 

Vref is externally sourced from the VREFI pin.

◆ sdadc_vref_voltage_t

Voltage of Vref.

Enumerator
SDADC_VREF_VOLTAGE_800_MV 

Vref is 0.8 V.

SDADC_VREF_VOLTAGE_1000_MV 

Vref is 1.0 V.

SDADC_VREF_VOLTAGE_1200_MV 

Vref is 1.2 V.

SDADC_VREF_VOLTAGE_1400_MV 

Vref is 1.4 V.

SDADC_VREF_VOLTAGE_1600_MV 

Vref is 1.6 V.

SDADC_VREF_VOLTAGE_1800_MV 

Vref is 1.8 V.

SDADC_VREF_VOLTAGE_2000_MV 

Vref is 2.0 V.

SDADC_VREF_VOLTAGE_2200_MV 

Vref is 2.2 V.

SDADC_VREF_VOLTAGE_2400_MV 

Vref is 2.4 V (only valid for external Vref)

◆ sdadc_channel_input_t

Per channel input mode.

Enumerator
SDADC_CHANNEL_INPUT_DIFFERENTIAL 

Differential input.

SDADC_CHANNEL_INPUT_SINGLE_ENDED 

Single-ended input.

◆ sdadc_channel_stage_1_gain_t

Per channel stage 1 gain options.

Enumerator
SDADC_CHANNEL_STAGE_1_GAIN_1 

Gain of 1.

SDADC_CHANNEL_STAGE_1_GAIN_2 

Gain of 2.

SDADC_CHANNEL_STAGE_1_GAIN_3 

Gain of 3 (only valid for stage 1)

SDADC_CHANNEL_STAGE_1_GAIN_4 

Gain of 4.

SDADC_CHANNEL_STAGE_1_GAIN_8 

Gain of 8.

◆ sdadc_channel_stage_2_gain_t

Per channel stage 2 gain options.

Enumerator
SDADC_CHANNEL_STAGE_2_GAIN_1 

Gain of 1.

SDADC_CHANNEL_STAGE_2_GAIN_2 

Gain of 2.

SDADC_CHANNEL_STAGE_2_GAIN_4 

Gain of 4.

SDADC_CHANNEL_STAGE_2_GAIN_8 

Gain of 8.

◆ sdadc_channel_oversampling_t

Per channel oversampling ratio.

Enumerator
SDADC_CHANNEL_OVERSAMPLING_64 

Oversampling ratio of 64.

SDADC_CHANNEL_OVERSAMPLING_128 

Oversampling ratio of 128.

SDADC_CHANNEL_OVERSAMPLING_256 

Oversampling ratio of 256.

SDADC_CHANNEL_OVERSAMPLING_512 

Oversampling ratio of 512.

SDADC_CHANNEL_OVERSAMPLING_1024 

Oversampling ratio of 1024.

SDADC_CHANNEL_OVERSAMPLING_2048 

Oversampling ratio of 2048.

◆ sdadc_channel_polarity_t

Per channel polarity, valid for single-ended input only.

Enumerator
SDADC_CHANNEL_POLARITY_POSITIVE 

Positive-side single-ended input.

SDADC_CHANNEL_POLARITY_NEGATIVE 

Negative-side single-ended input.

◆ sdadc_channel_average_t

Per channel number of conversions to average before conversion end callback.

Enumerator
SDADC_CHANNEL_AVERAGE_NONE 

Do not average (callback for each conversion)

SDADC_CHANNEL_AVERAGE_8 

Average 8 samples for each conversion end callback.

SDADC_CHANNEL_AVERAGE_16 

Average 16 samples for each conversion end callback.

SDADC_CHANNEL_AVERAGE_32 

Average 32 samples for each conversion end callback.

SDADC_CHANNEL_AVERAGE_64 

Average 64 samples for each conversion end callback.

◆ sdadc_channel_inversion_t

Per channel polarity, valid for negative-side single-ended input only.

Enumerator
SDADC_CHANNEL_INVERSION_OFF 

Do not invert conversion result.

SDADC_CHANNEL_INVERSION_ON 

Invert conversion result.

◆ sdadc_channel_count_formula_t

Select a formula to specify the number of conversions. The following symbols are used in the formulas:

  • N: Number of conversions
  • n: sdadc_channel_cfg_t::coefficient_n, do not set to 0 if m is 0
  • m: sdadc_channel_cfg_t::coefficient_m, do not set to 0 if n is 0

Either m or n must be non-zero.

Enumerator
SDADC_CHANNEL_COUNT_FORMULA_EXPONENTIAL 

N = 32 * (2 ^ n - 1) + m * 2 ^ n.

SDADC_CHANNEL_COUNT_FORMULA_LINEAR 

N = (32 * n) + m.

◆ sdadc_calibration_t

Calibration mode.

Enumerator
SDADC_CALIBRATION_INTERNAL_GAIN_OFFSET 

Use internal reference to calibrate offset and gain.

SDADC_CALIBRATION_EXTERNAL_OFFSET 

Use external reference to calibrate offset.

SDADC_CALIBRATION_EXTERNAL_GAIN 

Use external reference to calibrate gain.

Function Documentation

◆ R_SDADC_Open()

fsp_err_t R_SDADC_Open ( adc_ctrl_t p_ctrl,
adc_cfg_t const *const  p_cfg 
)

Applies power to the SDADC and initializes the hardware based on the user configuration. As part of this initialization, the SDADC clock is configured and enabled. If an interrupt priority is non-zero, enables an interrupt which will call a callback to notify the user when a conversion, scan, or calibration is complete. R_SDADC_Calibrate() must be called after this function before using the SDADC if any channels are used in differential mode. Implements adc_api_t::open().

Note
This function delays at least 2 ms as required by the SDADC power on procedure.
Return values
FSP_SUCCESSConfiguration successful.
FSP_ERR_ASSERTIONAn input pointer is NULL or an input parameter is invalid.
FSP_ERR_ALREADY_OPENControl block is already open.
FSP_ERR_IRQ_BSP_DISABLEDA required interrupt is disabled

◆ R_SDADC_ScanCfg()

fsp_err_t R_SDADC_ScanCfg ( adc_ctrl_t p_ctrl,
void const *const  p_extend 
)

Configures the enabled channels of the ADC. Pass a pointer to sdadc_scan_cfg_t to p_extend. Implements adc_api_t::scanCfg().

Return values
FSP_SUCCESSInformation stored in p_adc_info.
FSP_ERR_ASSERTIONAn input pointer is NULL or an input parameter is invalid.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_InfoGet()

fsp_err_t R_SDADC_InfoGet ( adc_ctrl_t p_ctrl,
adc_info_t p_adc_info 
)

Returns the address of the lowest number configured channel, the total number of results to be read in order to read the results of all configured channels, the size of each result, and the ELC event enumerations. Implements adc_api_t::infoGet().

Return values
FSP_SUCCESSInformation stored in p_adc_info.
FSP_ERR_ASSERTIONAn input pointer was NULL.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_ScanStart()

fsp_err_t R_SDADC_ScanStart ( adc_ctrl_t p_ctrl)

If the SDADC is configured for hardware triggers, enables hardware triggers. Otherwise, starts a scan. Implements adc_api_t::scanStart().

Return values
FSP_SUCCESSScan started or hardware triggers enabled successfully.
FSP_ERR_ASSERTIONAn input pointer was NULL.
FSP_ERR_NOT_OPENInstance control block is not open.
FSP_ERR_IN_USEA conversion or calibration is in progress.

◆ R_SDADC_ScanGroupStart()

fsp_err_t R_SDADC_ScanGroupStart ( adc_ctrl_t p_ctrl,
adc_group_mask_t  group_id 
)

adc_api_t::scanStart is not supported on the SDADC. Use scanStart instead.

Return values
FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.

◆ R_SDADC_ScanStop()

fsp_err_t R_SDADC_ScanStop ( adc_ctrl_t p_ctrl)

If the SDADC is configured for hardware triggers, disables hardware triggers. Otherwise, stops any in-progress scan started by software. Implements adc_api_t::scanStop().

Return values
FSP_SUCCESSScan stopped or hardware triggers disabled successfully.
FSP_ERR_ASSERTIONAn input pointer was NULL.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_StatusGet()

fsp_err_t R_SDADC_StatusGet ( adc_ctrl_t p_ctrl,
adc_status_t p_status 
)

Returns the status of a scan started by software, including calibration scans. It is not possible to determine the status of a scan started by a hardware trigger. Implements adc_api_t::scanStatusGet().

Return values
FSP_SUCCESSNo software scan or calibration is in progress.
FSP_ERR_ASSERTIONAn input pointer was NULL.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_Read()

fsp_err_t R_SDADC_Read ( adc_ctrl_t p_ctrl,
adc_channel_t const  reg_id,
uint16_t *const  p_data 
)

Reads the most recent conversion result from a channel. Truncates 24-bit results to the upper 16 bits. Implements adc_api_t::read().

Note
The result stored in p_data is signed when the SDADC channel is configured in differential mode.
Do not use this API if the conversion end interrupt (SDADC0_ADI) is used to trigger the DTC unless the interrupt mode is set to TRANSFER_IRQ_EACH.
Return values
FSP_SUCCESSConversion result in p_data.
FSP_ERR_ASSERTIONAn input pointer was NULL or an input parameter was invalid.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_Read32()

fsp_err_t R_SDADC_Read32 ( adc_ctrl_t p_ctrl,
adc_channel_t const  reg_id,
uint32_t *const  p_data 
)

Reads the most recent conversion result from a channel. Implements adc_api_t::read32().

Note
The result stored in p_data is signed when the SDADC channel is configured in differential mode. When the SDADC is configured for 24-bit resolution and right alignment, the sign bit is bit 23, and the upper 8 bits are 0. When the SDADC is configured for 16-bit resolution and right alignment, the sign bit is bit 15, and the upper 16 bits are 0.
Do not use this API if the conversion end interrupt (SDADC0_ADI) is used to trigger the DTC unless the interrupt mode is set to TRANSFER_IRQ_EACH.
Return values
FSP_SUCCESSConversion result in p_data.
FSP_ERR_ASSERTIONAn input pointer was NULL or an input parameter was invalid.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_OffsetSet()

fsp_err_t R_SDADC_OffsetSet ( adc_ctrl_t *const  p_ctrl,
adc_channel_t const  reg_id,
int32_t const  offset 
)

Sets the offset. Offset is applied after stage 1 of the input channel. Offset can only be applied when the channel is configured for differential input. Implements adc_api_t::offsetSet().

Note: The offset is cleared if adc_api_t::calibrate() is called. The offset can be re-applied if necessary after the the callback with event ADC_EVENT_CALIBRATION_COMPLETE is called.

Parameters
[in]p_ctrlSee p_instance_ctrl in adc_api_t::offsetSet().
[in]reg_idSee reg_id in adc_api_t::offsetSet().
[in]offsetMust be between -15 and 15, offset (mV) = 10.9376 mV * offset_steps / stage 1 gain.
Return values
FSP_SUCCESSOffset updated successfully.
FSP_ERR_ASSERTIONAn input pointer was NULL or an input parameter was invalid.
FSP_ERR_IN_USEA conversion or calibration is in progress.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_Calibrate()

fsp_err_t R_SDADC_Calibrate ( adc_ctrl_t *const  p_ctrl,
void const *  p_extend 
)

Requires sdadc_calibrate_args_t passed to p_extend. Calibrates the specified channel. Calibration is not required or supported for single-ended mode. Calibration must be completed for differential mode before using the SDADC. A callback with the event ADC_EVENT_CALIBRATION_COMPLETE is called when calibration completes. Implements adc_api_t::calibrate().

During external offset calibration, apply a differential voltage of 0 to ANSDnP - ANSDnN, where n is the input channel and ANSDnP is OPAMP0 for channel 4 and ANSDnN is OPAMP1 for channel 4. Complete external offset calibration before external gain calibration.

During external gain calibration apply a voltage between 0.4 V / total_gain and 0.8 V / total_gain. The differential voltage applied during calibration is corrected to a conversion result of 0x7FFFFF, which is the maximum possible positive differential measurement.

This function clears the offset value. If offset is required after calibration, it must be reapplied after calibration is complete using adc_api_t::offsetSet.

Return values
FSP_SUCCESSCalibration began successfully.
FSP_ERR_ASSERTIONAn input pointer was NULL.
FSP_ERR_IN_USEA conversion or calibration is in progress.
FSP_ERR_NOT_OPENInstance control block is not open.

◆ R_SDADC_Close()

fsp_err_t R_SDADC_Close ( adc_ctrl_t p_ctrl)

Stops any scan in progress, disables interrupts, and powers down the SDADC peripheral. Implements adc_api_t::close().

Note
This function delays at least 3 us as required by the SDADC24 stop procedure.
Return values
FSP_SUCCESSInstance control block closed successfully.
FSP_ERR_ASSERTIONAn input pointer was NULL.
FSP_ERR_NOT_OPENInstance control block is not open.