Functions
fsp_err_t	R_SDADC_B_Open (adc_ctrl_t p_ctrl, adc_cfg_t const const p_cfg)

fsp_err_t	R_SDADC_B_ScanCfg (adc_ctrl_t p_ctrl, void const const p_extend)

fsp_err_t	R_SDADC_B_InfoGet (adc_ctrl_t p_ctrl, adc_info_t p_adc_info)

fsp_err_t	R_SDADC_B_ScanStart (adc_ctrl_t *p_ctrl)

fsp_err_t	R_SDADC_B_ScanGroupStart (adc_ctrl_t *p_ctrl, adc_group_mask_t group_id)

fsp_err_t	R_SDADC_B_ScanStop (adc_ctrl_t *p_ctrl)

fsp_err_t	R_SDADC_B_StatusGet (adc_ctrl_t p_ctrl, adc_status_t p_status)

fsp_err_t	R_SDADC_B_Read (adc_ctrl_t p_ctrl, adc_channel_t const reg_id, uint16_t const p_data)

fsp_err_t	R_SDADC_B_Read32 (adc_ctrl_t p_ctrl, adc_channel_t const reg_id, uint32_t const p_data)

fsp_err_t	R_SDADC_B_OffsetSet (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t const offset)

fsp_err_t	R_SDADC_B_Calibrate (adc_ctrl_t const p_ctrl, void const p_extend)

fsp_err_t	R_SDADC_B_Close (adc_ctrl_t *p_ctrl)

Detailed Description

Driver for the SDADC_B peripheral on RA MCUs. This module implements the ADC Interface.

Overview

Features

The SDADC_B module supports the following features:

24 bit maximum resolution
Configure scans to include:
- Multiple analog channels
Configurable sampling mode:
- 4 kHz sampling mode
- 8 kHz sampling mode
- 8 kHz/4 kHz Hybrid sampling mode
Configurable Cut-off frequency of high-pass filter
Configurable preamplifier gain for each channel
Configurable phase adjustment for each channel
Optional callback when conversion completes or zero-cross is detected
Supports reading converted data
Supports positive and negative input voltage

Selecting an ADC

All RA MCUs have an ADC (r_adc). Only select RA MCUs have an SDADC_B. When selecting between them, consider these factors. Refer to the hardware manual for details.

	ADC	SDADC_B
Availability	Available on all RA MCUs.	Available on select RA MCUs.
Resolution	The ADC has a maximum resolution of 12, 14, or 16 bits depending on the MCU.	The SDADC_B has a maximum accuracy of 24 bits.
Number of Channels	The ADC has 4 channels.	The SDADC_B has up to 7 channels.
Frequency	The ADC sampling time is shorter (more samples per second).	The SDADC sampling time is longer (fewer samples per second).

Configuration

Build Time Configurations for r_sdadc_b

The following build time configurations are defined in fsp_cfg/r_sdadc_b_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.

Clock Configuration

The SDADC_B clock is configurable on the clocks tab.

The SDADC_B clock must be 12 MHz, 12.8 MHz or 16 MHz when the SDADC_B is used.

Pin Configuration

The ANINn/ANIPn (n = 0-6) pins are analog input channels that can be used with the SDADC_B.

Virtual Channel Configuration

When 8KHz/4KHz Hybrid Mode is enabled, selected Virtual Channels 0 to 3 are converted at an 8KHz rate and corresponding Virtual Channels 4 to 7 are converted at a 4KHz rate.
In some locations, 4KHz Hybrid Mode conversions may be referred to 'Type 2'. All other conversions may be referred to as 'Type 1'. The SDADC_B driver abstracts 'Type 1' and 'Type 2' and populates the user callback arguments with a mask of converted channel IDs. It is the responsibility of the application to know the configuration of provided channel IDs.
Configuration of enabled virtual channels corresponding to Sampling mode is subject to below constraints:
- Analog input n (n = 0 to 3) must be configured for Virtual Channel m (m = 4 to 7) if corresponding Analog input n is configured for Virtual Channel n and Hybrid mode is enabled
- Analog input 4 to 6 cannot be configured for Virtual Channel 4 to 6 when Hybrid mode is enabled
- Virtual Channel 7 can only be configured when Hybrid mode is enabled

Usage Notes

Cut-off frequency of HPF

Cut-off frequency of HPF (High Pass Filter) is selectable by setting SDADHPFCR.COF bit. Value of cut-off frequency of HPF corresponding to each COF value is as below table:

COF	4 kHz sampling mode fos = 1.5 MHz	4 kHz sampling mode fos = 1.6 MHz	8 kHz sampling mode fos = 3.0 MHz	8 kHz sampling mode fos = 3.2 MHz	8 kHz/4 kHz hybrid sampling mode fos = 3.0 MHz	8 kHz/4 kHz hybrid sampling mode fos = 3.2 MHz
COF 0	0.607 Hz	0.647 Hz	1.214 Hz	1.295 Hz	1.214 Hz	1.295 Hz
COF 1	1.214 Hz	1.295 Hz	2.427 Hz	2.589 Hz	2.427 Hz	2.589 Hz
COF 2	2.427 Hz	2.589 Hz	4.855 Hz	5.179 Hz	4.855 Hz	5.179 Hz
COF 3	4.855 Hz	5.179 Hz	9.710 Hz	10.357 Hz	1.214 Hz (Type 1) 0.607 Hz (Type 2)	1.295 Hz (Type 1) 0.647 Hz (Type 2)

Channel ID used in driver

Channel ID input to R_SDADC_B_Read and R_SDADC_B_Read32 API and Channel Mask provided to user callback is the virtual channel ID and does not necessarily correspond to a physical input channel number. When Hybrid sampling mode is enabled, reading conversion result for channel 4 to 7 returns the 4 kHz conversion (Type 2) result of corresponding channel 0 to 3.

Scan Procedure

Operation of 24-bit Sigma-Delta A/D Converter is as below:

Conversions are performed on enabled channels in ascending order of channel number after software trigger is started using R_SDADC_B_ScanStart() API.
Conversions are performed at the rate (in Hz) of the SDADC_B sampling clock frequency.
The user callback function will be invoked after enabled channels are scanned.
If zero-cross detection interrupt is enabled, a zero-cross detection interrupt occurs in synchronization with the rising edge of the SDADC conversion end interrupt.

Triggering ELC Events with SDADC_B

The interrupt signals SDADC_B can trigger the start of other peripherals. The Event Link Controller (r_elc) guide provides a list of all available peripherals.
Note
When using ELC events to directly read converted data, it is the responsibility of the application to ensure that the stabilization period of 80 conversions has passed since starting the converter by using R_SDADC_B_StatusGet() API.

Limitations

After powering on, an internal setup time is necessary. During this time R_SDADC_B_StatusGet() will return ADC_STATE_CALIBRATION_IN_PROGRESS.
SDADC_B does not operate in software standby mode. To reduce current comsumption, stop and close the SDADC_B module before entering software standby.
After stopping the conversion using R_SDADC_B_ScanStop() API, it is necessary to wait at least 1.4us before performing conversion again.

Examples

Basic Example

This is a basic example of minimal use of the SDADC_B in an application.

void sdadc_b_basic_example (void)
{
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_SDADC_B_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* In software trigger mode, start a scan by calling R_SDADC_B_ScanStart(). In other modes, enable external
     * triggers by calling R_SDADC_B_ScanStart(). */
    (void) R_SDADC_B_ScanStart(&g_adc0_ctrl);
    /* Wait for conversion to complete. */
    adc_status_t status;
    status.state = ADC_STATE_CALIBRATION_IN_PROGRESS;
    while (ADC_STATE_CALIBRATION_IN_PROGRESS == status.state)
    {
        R_SDADC_B_StatusGet(&g_adc0_ctrl, &status);
    }
    /* Read converted data. */
    uint32_t channel1_conversion_result;
    R_SDADC_B_Read32(&g_adc0_ctrl, ADC_CHANNEL_1, &channel1_conversion_result);
}

Using DTC or DMAC with the SDADC_B

If desired, the DTC or DMAC can be used to store each conversion result in a circular buffer. An example configuration is below.

/* Example DTC transfer settings to used with SDADC_B. */
/* The transfer length should match the total number of conversions per scan. This example assumes the SDADC_B is
 * configured to scan all 7 channels. */
#define SDADC_B_EXAMPLE_TRANSFER_LENGTH    (7)
uint32_t g_sdadc_b_example_buffer[SDADC_B_EXAMPLE_TRANSFER_LENGTH];
transfer_info_t g_sdadc_b_transfer_info =
{
    .transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
    .transfer_settings_word_b.repeat_area    = TRANSFER_REPEAT_AREA_DESTINATION,
    .transfer_settings_word_b.irq            = TRANSFER_IRQ_END,
    .transfer_settings_word_b.chain_mode     = TRANSFER_CHAIN_MODE_DISABLED,
    .transfer_settings_word_b.src_addr_mode  = TRANSFER_ADDR_MODE_FIXED,
    .transfer_settings_word_b.mode           = TRANSFER_MODE_REPEAT,
    /* NOTE: The data transferred will contain a 24-bit converted value in bits 23:0. The settings for
     * resolution and alignment are ignored when DTC or DMAC is used. */
    .transfer_settings_word_b.size           = TRANSFER_SIZE_4_BYTE,
    .p_src  = (void const *) &R_SDADC_B->SDADCR0,
    .p_dest = &g_sdadc_b_example_buffer[0],
    .length = SDADC_B_EXAMPLE_TRANSFER_LENGTH,
};
void sdadc_b_dtc_example (void)
{
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_SDADC_B_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start a scan by calling R_SDADC_B_ScanStart(). */
    (void) R_SDADC_B_ScanStart(&g_adc0_ctrl);
    /* Wait for conversion to complete. */
    adc_status_t status;
    status.state = ADC_STATE_CALIBRATION_IN_PROGRESS;
    while (ADC_STATE_CALIBRATION_IN_PROGRESS == status.state)
    {
        R_SDADC_B_StatusGet(&g_adc0_ctrl, &status);
    }
    /* After each conversion, the converted data is transferred to the next index in g_sdadc_b_example_buffer. After
     * the entire scan completes, the index in g_sdadc_b_example_buffer resets. The data in g_sdadc_b_example_buffer
     * is:
     *  - g_sdadc_b_example_buffer[0] = SDADC_B channel 0
     *  - g_sdadc_b_example_buffer[1] = SDADC_B channel 1
     *  - g_sdadc_b_example_buffer[2] = SDADC_B channel 2
     *  - g_sdadc_b_example_buffer[3] = SDADC_B channel 3
     *  - g_sdadc_b_example_buffer[4] = SDADC_B channel 4
     *  - g_sdadc_b_example_buffer[5] = SDADC_B channel 5
     *  - g_sdadc_b_example_buffer[6] = SDADC_B channel 6
     *//* At any point in the application after the first scan completes, the most recent data for channel 2 can be read
     * from the buffer like this. Conversion data is signed integer value. */
    int32_t channel_2_data = (int32_t) g_sdadc_b_example_buffer[2];
    FSP_PARAMETER_NOT_USED(channel_2_data);
}

Data Structures
struct	sdadc_b_scan_cfg_t

struct	sdadc_b_extended_cfg_t

struct	sdadc_b_instance_ctrl_t

Enumerations
enum	sdadc_b_oper_clk_t

enum	sdadc_b_channel_mode_t

enum	sdadc_b_channel_power_t

enum	sdadc_b_samp_mode_t

enum	sdadc_b_channel_gain_t

enum	sdadc_b_channel_hpf_t

enum	sdadc_b_resolution_t

enum	sdadc_b_zc_channel_t

enum	sdadc_b_zc_output_mode_t

enum	sdadc_b_zc_falling_edge_detection_t

enum	sdadc_b_zc_rising_edge_detection_t

enum	sdadc_b_cutoff_t

Data Structure Documentation

◆ sdadc_b_scan_cfg_t

struct sdadc_b_scan_cfg_t

SDADC_B active channel configuration.

Data Fields
union sdadc_b_scan_cfg_t	__unnamed__
sdadc_b_cutoff_t	hpf_cutoff	Cut-off frequency of HPF.
sdadc_b_channel_gain_t	gain_setting[SDADC_B_MAX_NUM_CHANNELS - 1]	Gain setting.
sdadc_b_channel_hpf_t	hpf_setting[SDADC_B_MAX_NUM_CHANNELS]	High pass filter on-off.
uint16_t	phase_adjustment[SDADC_B_MAX_NUM_CHANNELS]	Phase adjustment for each channels.

◆ sdadc_b_extended_cfg_t

struct sdadc_b_extended_cfg_t

SDADC configuration extension. This extension is required and must be provided in adc_cfg_t::p_extend.

Data Fields
sdadc_b_oper_clk_t	oper_clk	Operating clock of the digital block.
sdadc_b_samp_mode_t	sampling_mode	Sampling mode select.
sdadc_b_scan_cfg_t const *	p_channel_cfg	Pointer to original channel config data.
uint8_t	conv_end_ipl	Conversion end interrupt priority.
IRQn_Type	conv_end_irq	Conversion type 1 end IRQ number.
IRQn_Type	conv_end_irq2	Conversion type 2 end IRQ number.
uint8_t	zc_ipl	Zero-cross detection 0 interrupt priority.
IRQn_Type	zc_irq	Zero-cross detection 0 IRQ number.
uint8_t	zc_ipl2	Zero-cross detection 1 interrupt priority.
IRQn_Type	zc_irq2	Zero-cross detection 1 IRQ number.
union sdadc_b_extended_cfg_t	__unnamed__

◆ sdadc_b_instance_ctrl_t

struct sdadc_b_instance_ctrl_t

SDADC instance control block. DO NOT INITIALIZE. Initialized in adc_api_t::open().

Data Fields
adc_cfg_t const *	p_cfg
uint32_t	opened	Boolean to verify that the Unit has been initialized.
uint32_t	channel_mask	Channel mask to keep track of channels enabled in scanCfg.
struct sdadc_b_instance_ctrl_t	results
uint32_t	setup_time_cnt	Period of 80 conversions for internal setup time.
uint8_t	calibration_complete	Calibration is completed if set.

Enumeration Type Documentation

◆ sdadc_b_oper_clk_t

enum sdadc_b_oper_clk_t

Operating clock of the digital block.

Enumerator
SDADC_B_CLOCK_DISABLE	Disable operating clock.
SDADC_B_CLOCK_IS_12MHZ	Clock frequency is 12MHz or 12.8MHz.
SDADC_B_CLOCK_IS_16MHZ	Clock frequency is 16MHz.

◆ sdadc_b_channel_mode_t

enum sdadc_b_channel_mode_t

Per channel operation mode.

Enumerator
SDADC_B_ELECTRIC_CHARGE_RESET	Electric charge reset.
SDADC_B_NORMAL_OPERATION	Normal operation.

◆ sdadc_b_channel_power_t

enum sdadc_b_channel_power_t

Per channel power-on control.

Enumerator
SDADC_B_CHANNEL_POWER_OFF	Power off.
SDADC_B_CHANNEL_POWER_ON	Power on.

◆ sdadc_b_samp_mode_t

enum sdadc_b_samp_mode_t

Sampling mode select.

Enumerator
SDADC_B_4KHZ_SAMPLING_MODE	4 kHz sampling mode
SDADC_B_8KHZ_SAMPLING_MODE	8 kHz sampling mode
SDADC_B_HYBRID_SAMPLING_MODE	8 kHz / 4 kHz hybird sampling mode

◆ sdadc_b_channel_gain_t

enum sdadc_b_channel_gain_t

Per channel preamplifier gain options.

Enumerator
SDADC_B_CHANNEL_GAIN_1	Gain of 1.
SDADC_B_CHANNEL_GAIN_2	Gain of 2.
SDADC_B_CHANNEL_GAIN_4	Gain of 4.
SDADC_B_CHANNEL_GAIN_8	Gain of 8.
SDADC_B_CHANNEL_GAIN_16	Gain of 16.
SDADC_B_CHANNEL_GAIN_32	Gain of 32.

◆ sdadc_b_channel_hpf_t

enum sdadc_b_channel_hpf_t

Per channel HPF bypass.

Enumerator
SDADC_B_CHANNEL_HPF_ENABLE	HPF enable.
SDADC_B_CHANNEL_HPF_DISABLE	HPF disable.

◆ sdadc_b_resolution_t

enum sdadc_b_resolution_t

SDADC data resolution definitions

Enumerator
SDADC_B_RESOLUTION_24_BIT	24 bit resolution
SDADC_B_RESOLUTION_16_BIT	16 bit resolution

◆ sdadc_b_zc_channel_t

enum sdadc_b_zc_channel_t

Zero-cross detection channel

Enumerator
SDADC_B_ZC_CHANNEL_2_OR_3	Detect channel 2 (ZCCTL0) or channel 3 (ZCCTL1)
SDADC_B_ZC_CHANNEL_1_OR_0	Detect channel 1 (ZCCTL0) or channel 0 (ZCCTL1)

◆ sdadc_b_zc_output_mode_t

enum sdadc_b_zc_output_mode_t

Zero-cross detection output mode.

Enumerator
SDADC_B_ZC_PULSE_OUTPUT_MODE	Pulse output mode.
SDADC_B_ZC_LEVEL_OUTPUT_MODE	Level output mode.

◆ sdadc_b_zc_falling_edge_detection_t

enum sdadc_b_zc_falling_edge_detection_t

Zero-cross detection output mode.

Enumerator
SDADC_B_ZC_FALLING_EDGE_DETECTION_DISABLE	Disabled.
SDADC_B_ZC_FALLING_EDGE_DETECTION_ENABLE	Enabled.

◆ sdadc_b_zc_rising_edge_detection_t

enum sdadc_b_zc_rising_edge_detection_t

Zero-cross detection output mode.

Enumerator
SDADC_B_ZC_RISING_EDGE_DETECTION_DISABLE	Disabled.
SDADC_B_ZC_RISING_EDGE_DETECTION_ENABLE	Enabled.

◆ sdadc_b_cutoff_t

enum sdadc_b_cutoff_t

HPF cut off. The enum value is to set to SDADHPFCR register. See Table 31.8 Cut-off frequency of HPF of the manual R01UH1005EJ0051

Enumerator
SDADC_B_CUTOFF_00B	Cut-off frequency 0.
SDADC_B_CUTOFF_01B	Cut-off frequency 1.
SDADC_B_CUTOFF_10B	Cut-off frequency 2.
SDADC_B_CUTOFF_11B	Cut-off frequency 3.

Function Documentation

◆ R_SDADC_B_Open()

fsp_err_t R_SDADC_B_Open	(	adc_ctrl_t *	p_ctrl,
		adc_cfg_t const *const	p_cfg
	)

Applies power to the SDADC_B and initializes the hardware based on the user configuration. Enabling interrupts which will call a callback to notify the user when a conversion is completed or a zero-cross is detected. Implements adc_api_t::open().

Return values

FSP_SUCCESS	Configuration successful.
FSP_ERR_ASSERTION	An input pointer is NULL or an input parameter is invalid.
FSP_ERR_ALREADY_OPEN	Control block is already open.
FSP_ERR_INVALID_CHANNEL	Invalid channel configuration

◆ R_SDADC_B_ScanCfg()

fsp_err_t R_SDADC_B_ScanCfg	(	adc_ctrl_t *	p_ctrl,
		void const *const	p_extend
	)

Configures the enabled channels of the ADC. Implements adc_api_t::scanCfg().

Note: This function is not compatible with Hybrid Mode operation.

Return values

FSP_SUCCESS	Information stored in p_adc_info.
FSP_ERR_ASSERTION	An input pointer is NULL or an input parameter is invalid.
FSP_ERR_NOT_OPEN	Instance control block is not open.
FSP_ERR_INVALID_MODE	Hybrid mode channel configuration is invalid
FSP_ERR_INVALID_CHANNEL	Invalid channel configuration
FSP_ERR_INVALID_STATE	Converter operation must be stopped before reconfiguring

◆ R_SDADC_B_InfoGet()

fsp_err_t R_SDADC_B_InfoGet	(	adc_ctrl_t *	p_ctrl,
		adc_info_t *	p_adc_info
	)

Returns the address of the lowest number configured channel, the total number of results to be read in order to read the results of all configured channels, the size of each result, and the ELC event enumerations. Implements adc_api_t::infoGet().

Return values

FSP_SUCCESS	Conversion is started successfully.
FSP_ERR_NOT_OPEN	Instance control block is not open.
FSP_ERR_ASSERTION	An input pointer is NULL or an input parameter is invalid.

◆ R_SDADC_B_ScanStart()

fsp_err_t R_SDADC_B_ScanStart ( adc_ctrl_t * p_ctrl )

adc_api_t::scanStart().

Return values

FSP_SUCCESS	Conversion is started successfully.
FSP_ERR_NOT_OPEN	Instance control block is not open.
FSP_ERR_ASSERTION	An input pointer is NULL or an input parameter is invalid.

◆ R_SDADC_B_ScanGroupStart()

fsp_err_t R_SDADC_B_ScanGroupStart	(	adc_ctrl_t *	p_ctrl,
		adc_group_mask_t	group_id
	)

adc_api_t::scanGroupStart is not supported on the SDADC_B. Use scanStart instead.

Return values

FSP_ERR_UNSUPPORTED Function not supported in this implementation.

◆ R_SDADC_B_ScanStop()

fsp_err_t R_SDADC_B_ScanStop ( adc_ctrl_t * p_ctrl )

adc_api_t::scanStop().

Note: According to Hardware specification, after stopping the conversion, it is necessary to wait at least 1.4us before performing conversion again.

Return values

FSP_SUCCESS	Conversion is started successfully.
FSP_ERR_NOT_OPEN	Instance control block is not open.
FSP_ERR_ASSERTION	An input pointer is NULL or an input parameter is invalid.

◆ R_SDADC_B_StatusGet()

fsp_err_t R_SDADC_B_StatusGet	(	adc_ctrl_t *	p_ctrl,
		adc_status_t *	p_status
	)

Returns the status of a scan including calibration scans. Implements adc_api_t::scanStatusGet().

Return values

FSP_SUCCESS	Module status stored in the provided pointer p_status
FSP_ERR_ASSERTION	An input argument is invalid.
FSP_ERR_NOT_OPEN	Unit is not open.

◆ R_SDADC_B_Read()

fsp_err_t R_SDADC_B_Read	(	adc_ctrl_t *	p_ctrl,
		adc_channel_t const	reg_id,
		uint16_t *const	p_data
	)

Reads the most recent conversion result from a channel. Truncates 24-bit results to the upper 16 bits. When the SDADC_B is configured for 16-bit resolution, the sign bit is bit 15 and the upper 16 bits are 0. Implements adc_api_t::read().

Note: The result stored in p_data is signed.

Return values

FSP_SUCCESS	Conversion result in p_data.
FSP_ERR_ASSERTION	An input pointer was NULL or an input parameter was invalid.
FSP_ERR_NOT_OPEN	Instance control block is not open.
FSP_ERR_INVALID_DATA	Result buffer has not been updated with valid data.

◆ R_SDADC_B_Read32()

fsp_err_t R_SDADC_B_Read32	(	adc_ctrl_t *	p_ctrl,
		adc_channel_t const	reg_id,
		uint32_t *const	p_data
	)

Reads the most recent conversion result from a channel. Implements adc_api_t::read32().

Note: The result stored in p_data is signed.; When the SDADC is configured for 24-bit resolution, the upper 8 bits are sign extended.

Return values

FSP_SUCCESS	Conversion result in p_data.
FSP_ERR_ASSERTION	An input pointer was NULL or an input parameter was invalid.
FSP_ERR_NOT_OPEN	Instance control block is not open.
FSP_ERR_INVALID_DATA	Result buffer has not been updated with valid data.

◆ R_SDADC_B_OffsetSet()

fsp_err_t R_SDADC_B_OffsetSet	(	adc_ctrl_t *const	p_ctrl,
		adc_channel_t const	reg_id,
		int32_t const	offset
	)

adc_api_t::offsetSet is not supported on the SDADC_B.

Return values

FSP_ERR_UNSUPPORTED Function not supported in this implementation.

◆ R_SDADC_B_Calibrate()

fsp_err_t R_SDADC_B_Calibrate	(	adc_ctrl_t *const	p_ctrl,
		void const *	p_extend
	)

Calibration is performed automatically each time a scan is started. adc_api_t::calibrate is not supported on the SDADC_B.

Return values

FSP_ERR_UNSUPPORTED Function not supported in this implementation.

◆ R_SDADC_B_Close()

fsp_err_t R_SDADC_B_Close ( adc_ctrl_t * p_ctrl )

Stops any scan in progress, disables interrupts, and powers down the SDADC_B peripheral. Implements adc_api_t::close().

Return values

FSP_SUCCESS	Instance control block closed successfully.
FSP_ERR_ASSERTION	An input pointer was NULL.
FSP_ERR_NOT_OPEN	Instance control block is not open.

Functions

Detailed Description

Overview

Features

Selecting an ADC

Configuration

Build Time Configurations for r_sdadc_b

Clock Configuration

Pin Configuration

Virtual Channel Configuration

Usage Notes

Cut-off frequency of HPF

Channel ID used in driver

Scan Procedure

Triggering ELC Events with SDADC_B

Limitations

Examples

Basic Example

Using DTC or DMAC with the SDADC_B

Data Structures

Enumerations

Data Structure Documentation

◆ sdadc_b_scan_cfg_t

◆ sdadc_b_extended_cfg_t

◆ sdadc_b_instance_ctrl_t

Enumeration Type Documentation

◆ sdadc_b_oper_clk_t

◆ sdadc_b_channel_mode_t

◆ sdadc_b_channel_power_t

◆ sdadc_b_samp_mode_t

◆ sdadc_b_channel_gain_t

◆ sdadc_b_channel_hpf_t

◆ sdadc_b_resolution_t

◆ sdadc_b_zc_channel_t

◆ sdadc_b_zc_output_mode_t

◆ sdadc_b_zc_falling_edge_detection_t

◆ sdadc_b_zc_rising_edge_detection_t

◆ sdadc_b_cutoff_t

Function Documentation

◆ R_SDADC_B_Open()

◆ R_SDADC_B_ScanCfg()

◆ R_SDADC_B_InfoGet()

◆ R_SDADC_B_ScanStart()

◆ R_SDADC_B_ScanGroupStart()

◆ R_SDADC_B_ScanStop()

◆ R_SDADC_B_StatusGet()

◆ R_SDADC_B_Read()

◆ R_SDADC_B_Read32()

◆ R_SDADC_B_OffsetSet()

◆ R_SDADC_B_Calibrate()

◆ R_SDADC_B_Close()