Functions
fsp_err_t	R_ULPT_Open (timer_ctrl_t const p_ctrl, timer_cfg_t const const p_cfg)

fsp_err_t	R_ULPT_Start (timer_ctrl_t *const p_ctrl)

fsp_err_t	R_ULPT_Stop (timer_ctrl_t *const p_ctrl)

fsp_err_t	R_ULPT_Reset (timer_ctrl_t *const p_ctrl)

fsp_err_t	R_ULPT_Enable (timer_ctrl_t *const p_ctrl)

fsp_err_t	R_ULPT_Disable (timer_ctrl_t *const p_ctrl)

fsp_err_t	R_ULPT_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)

fsp_err_t	R_ULPT_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)

fsp_err_t	R_ULPT_CompareMatchSet (timer_ctrl_t *const p_ctrl, uint32_t const compare_match_value, timer_compare_match_t const match_channel)

fsp_err_t	R_ULPT_InfoGet (timer_ctrl_t const p_ctrl, timer_info_t const p_info)

fsp_err_t	R_ULPT_StatusGet (timer_ctrl_t const p_ctrl, timer_status_t const p_status)

fsp_err_t	R_ULPT_CallbackSet (timer_ctrl_t const p_api_ctrl, void(p_callback)(timer_callback_args_t ), void const const p_context, timer_callback_args_t *const p_callback_memory)

fsp_err_t	R_ULPT_Close (timer_ctrl_t *const p_ctrl)

Detailed Description

Driver for the ULPT peripheral on RA MCUs. This module implements the Timer Interface.

Overview

Features

The ULPT module has the following features:

Supports periodic mode, one-shot mode, and PWM mode.
Signal can be output to a pin.
Configurable period (counts per timer cycle).
Configurable duty cycle in PWM mode.
Configurable clock source, LOCO, SUBCLK, and external sources input to ULPTEVIn.
Supports runtime reconfiguration of period.
Supports runtime reconfiguration of duty cycle in PWM mode.
Supports counting based on an external clock input to ULPTEVIn.
Supports debounce filter on ULPTEVIn pins.
APIs are provided to start, stop, and reset the counter.
APIs are provided to get the current period, source clock frequency, and count direction.
APIs are provided to get the current timer status and counter value.

Selecting a Timer

RA MCUs can have multiple timer peripherals: the General PWM Timer (GPT) and the Asynchronous General Purpose Timer, and the Ultra Low Power Timer (ULPT). When selecting between them, consider these factors:

	GPT	AGT	ULPT
Low Power Modes	The GPT can operate in sleep mode.	The AGT can operate in all low power modes (when count source is LOCO or subclock).	The ULPT can operate in all low power up to DSTBYs (when count source is LOCO or subclock).
Available Channels	The number of GPT channels is device specific. All currently supported MCUs have at least 7 GPT channels.	All MCUs have 2 AGT channels.	The number of ULPT channels is device specific, 2 is common.
Timer Resolution	All MCUs have at least one 32-bit GPT timer.	The AGT timers are 16-bit timers.	The ULPT timers are 32-bit timers.
Clock Source	The GPT runs off PCLKD with a configurable divider up to 1024. It can also be configured to count ELC events or external pulses.	The AGT runs off PCLKB, LOCO, or subclock with a configurable divider up to 8 for PCLKB or up to 128 for LOCO or subclock.	The ULPT runs off PCLKB. LOCO, or subclock are count sources with a configurable divider up to 128.

Configuration

Build Time Configurations for r_ulpt

The following build time configurations are defined in fsp_cfg/r_ulpt_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.
Pin Output Support	Disabled Enabled	Disabled	If selected code for outputting a waveform to a pin is included in the build.
Pin Input Support	Disabled Enabled	Disabled	Enable input support to use ULPTEVin as count source

Configurations for Timers > Timer, Ultra-Low-Power (r_ulpt)

This module can be added to the Stacks tab via New Stack > Timers > Timer, Ultra-Low-Power (r_ulpt). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.

Configuration	Options	Default	Description
General
Name	Name must be a valid C symbol	g_timer0	Module name.
Channel	Channel number does not exist	0	Physical hardware channel.
Mode	Periodic One-Shot PWM	Periodic	Mode selection. Note: One-shot mode is implemented in software. ISR's must be enabled for one shot even if callback is unused.
Period	Value must be non-negative	0x10000	Specify the timer period based on the selected unit. When the unit is set to 'Raw Counts', setting the period to 0x10000 results in the maximum period at the lowest divisor (fastest timer tick). Set the period to 0x10000 for a free running timer, pulse width measurement or pulse period measurement. Setting the period higher will automatically select a higher divider; the period can be set up to 0x80000 when counting from PCLKB or 0x800000 when counting from LOCO/subclock, which will use a divider of 8 or 128 respectively with the maximum period. If the requested period cannot be achieved, the settings with the largest possible period that is less than or equal to the requested period are used. The theoretical calculated period is printed in a comment in the timer_cfg_t structure.
Period Unit	Raw Counts Nanoseconds Microseconds Milliseconds Seconds Hertz Kilohertz	Raw Counts	Unit of the period specified above
Count Source	LOCO SUBCLOCK EVI	LOCO	ULPT count source. NOTE: The divisor is calculated automatically based on the selected period. See ulpt_count_source_t documentation for details.
Output
Duty Cycle Percent (only applicable in PWM mode)	Value must be between 0 and 100	50	Specify the timer duty cycle percent. Only used in PWM mode.
ULPTOA Output	Disabled Start Level Low Start Level High	Disabled	Configure Match ULPTOA output.
ULPTOB Output	Disabled Start Level Low Start Level High	Disabled	Configure Match ULPTOB output.
ULPTO Output	Disabled Start Level Low Start Level High	Disabled	Configure Pulse ULPTO output.
Input
Input Filter	No Filter Filter sampled at PCLKB Filter sampled at PCLKB / 8 Filter sampled at PCLKB / 32	No Filter	ULPTEVIn filter. Only applies if the count source is ULPTEVIn, event counter mode. The filter requires the signal to be at the same level for 3 successive reads at the specified filter frequency.
Enable Pin	Enable Function Ignored Enable Function Low Enable Function High Enable Function Start Enable Function Restart	Enable Function Ignored	ULPTEEn enable edge. Only applies if the count source is ULPTEVIn, event counter mode
Trigger Edge	Trigger Edge Rising Trigger Edge Falling Trigger Edge Both	Trigger Edge Rising	ULPTEVIn trigger edge. Applies Only applies if the count source is ULPTEVIn, event counter mode.
Event Edge	Event Edge Rising Event Edge Falling Event Edge Both	Event Edge Rising	Select the ULPTEVin edge. Applies if count input is ULPTEVin.
Interrupts
Callback	Name must be a valid C symbol	NULL	A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the timer period elapses.
Underflow Interrupt Priority	MCU Specific Options		Timer interrupt priority.

Clock Configuration

The ULPT subsystem is driven by the PCLKB, but countdown is driven LOCO, Subclock, or event input. You can set the clock frequency using the Clocks tab of the RA Configuration editor or by using the CGC Interface at run-time.

Pin Configuration

This module can use the ULPTO, ULPTOA and ULPTOB pins as output pins for periodic, one-shot, or PWM signals.

For event counting, the input clocking signal must be applied to the ULPTEVIn pin.

Timer Period

The RA Configuration editor will automatically calculate the period count value and source clock divider based on the selected period time, units, and clock speed.

When the selected unit is "Raw counts", the maximum allowed period setting varies depending on the selected clock source:

Clock source	Maximum period (counts)
LOCO/Subclock	0xFFFFFFFF
All other sources	0xFFFFFFFF

Note: Though the ULPT is a 32-bit timer, because the period interrupt occurs when the counter underflows, setting the period register to 0 results in an effective period of 1 count. For this reason all user-provided raw count values reflect the actual number of period counts (not the raw register values).

Usage Notes

Starting and Stopping the ULPT

After starting or stopping the timer, ULPT registers cannot be accessed until the ULPT state is updated after 3 ULPTCLK cycles. If another ULPT function is called before the 3 ULPTCLK period elapses, the function spins waiting for the ULPT state to update. The required wait time after starting or stopping the timer can be determined using the frequency of ULPTCLK, which is derived from timer_cfg_t::source_div and ulpt_extended_cfg_t::count_source.

The application is responsible for ensuring required clocks are started and stable before accessing MCU peripheral registers.

Warning: The subclock can take seconds to stabilize. The RA startup code does not wait for subclock stabilization unless the subclock is the main clock source. When running ULPT or RTC off the subclock, the application must ensure the subclock is stable before starting operation.

Low Power Modes

The ULPT can be used to enter snooze mode or to wake the MCU from snooze, software standby, or deep software standby modes when a counter underflow occurs. The compare match A and B events can also be used to wake from software standby or snooze modes.

One-Shot Mode

The ULPT timer does support one-shot mode natively. The interrupt with put the module in the stop state. The callback is only called once in this case. If needed the timer needs to be re-started via the driver call.

Periodic Output

The ULPTO toggles each time the counter underflows.

Examples of periodic signals that can be generated by this module are shown below:

ULPT Periodic Output

PWM Output

The ULPTOA or ULPTOB pin toggles each time the compare match timer matches the down counter. It also toggles once the underflow occurs in periodic mode. for example setting the ULPT counter to 0x1000, and compare match A to half (0x800) will created a 50% duty cycle output on ULPTOA. Setting ULPTB to a quarter of that (0x400) will create a 25% duty cycle wave. Since the periodic output is actually a PWM output, the time at the stop level is one cycle shorter than the time opposite the stop level for odd period values.

Examples of periodic signals that can be generated by this module are shown below:

ULPT Periodic Output

Triggering ELC Events with ULPT

The ULPT timer can trigger the start of other peripherals. The Event Link Controller (r_elc) guide provides a list of all available peripherals.

Examples

ULPT Basic Example

This is a basic example of minimal use of the ULPT in an application.

void ulpt_basic_example (void)
{
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_ULPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start the timer. */
    (void) R_ULPT_Start(&g_timer0_ctrl);
    /* Read the current counter value. Counter value is in status.counter. */
    (void) R_ULPT_StatusGet(&g_timer0_ctrl, &status);
}

ULPT Callback Example

This is an example of a timer callback.

/* Example callback called when timer expires. */
void timer_callback (timer_callback_args_t * p_args)
{
    if (TIMER_EVENT_CYCLE_END == p_args->event)
    {
        /* Add application code to be called periodically here. */
    }
}

ULPT Free Running Counter Example

To use the ULPT as a free running counter, select periodic mode and set the the Period to 0xFFFFFFFF.

void ulpt_counter_example (void)
{
   fsp_err_t err = FSP_SUCCESS;
   timer_status_t status;
   /* Initializes the module. */
   err = R_ULPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
   /* Handle any errors. This function should be defined by the user. */
   assert(FSP_SUCCESS == err);
   /* Start the timer. */
   (void) R_ULPT_Start(&g_timer0_ctrl);
   /* (Optional) Stop the timer. This will set the counter back to max */
   (void) R_ULPT_Stop(&g_timer0_ctrl);
   /* Read the current counter value. Counter value is in status.counter. */
   (void) R_ULPT_StatusGet(&g_timer0_ctrl, &status);
}

ULPT Period Update Example

This an example of updating the period.

#define ULPT_EXAMPLE_MSEC_PER_SEC           (1000)
#define ULPT_EXAMPLE_DESIRED_PERIOD_MSEC    (20)
/* This example shows how to calculate a new period value at runtime. */
void ulpt_period_calculation_example (void)
{
   fsp_err_t err = FSP_SUCCESS;
   timer_info_t ulptInfo;
   uint32_t timer_freq_hz =0;
   /* Initializes the module. */
   err = R_ULPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
   /* Handle any errors. This function should be defined by the user. */
   assert(FSP_SUCCESS == err);
   /* Start the timer. */
   (void) R_ULPT_Start(&g_timer0_ctrl);
   err = R_ULPT_Enable(&g_timer0_ctrl);
   
      /* Get the source clock frequency (in Hz).
    *  - Use the R_ULPT_InfoGet function (it accounts for the clock source and divider). */
   if (R_ULPT_InfoGet (&g_timer0_ctrl, &ulptInfo) == FSP_SUCCESS)
   {
       timer_freq_hz = ulptInfo.clock_frequency;
   }
   /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT32_MAX / pclkb_freq_hz. A cast to uint64_t is used to prevent this. */
   uint32_t period_counts =
       (uint32_t) (((uint64_t) timer_freq_hz * ULPT_EXAMPLE_DESIRED_PERIOD_MSEC) / ULPT_EXAMPLE_MSEC_PER_SEC);
   /* Set the calculated period. This will return an error if parameter checking is enabled and the calculated
    * period is larger than UINT16_MAX. */
   err = R_ULPT_PeriodSet(&g_timer0_ctrl, period_counts);
   assert(FSP_SUCCESS == err);
   err = R_ULPT_Disable(&g_timer0_ctrl);
}

ULPT Duty Cycle Update Example

This an example of updating the duty cycle.

#define ULPT_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT    (25)
#define ULPT_EXAMPLE_MAX_PERCENT                   (100)
/* This example shows how to calculate a new duty cycle value at runtime. */
void ulpt_duty_cycle_calculation_example (void)
{
   fsp_err_t err = FSP_SUCCESS;
   /* Initializes the module. */
   err = R_ULPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
   /* Handle any errors. This function should be defined by the user. */
   assert(FSP_SUCCESS == err);
   /* Start the timer. */
   (void) R_ULPT_Start(&g_timer0_ctrl);
   /* Get the current period setting. */
   timer_info_t info;
   (void) R_ULPT_InfoGet(&g_timer0_ctrl, &info);
   uint32_t current_period_counts = info.period_counts;
   /* Calculate the desired duty cycle based on the current period. */
   uint32_t duty_cycle_counts = (current_period_counts * ULPT_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT) /
                                ULPT_EXAMPLE_MAX_PERCENT;
   
   /* Set the calculated duty cycle. */
   err = R_ULPT_DutyCycleSet(&g_timer0_ctrl, duty_cycle_counts, ULPT_OUTPUT_PIN_ULPTOA);
   assert(FSP_SUCCESS == err);
}

Data Structures
struct	ulpt_instance_ctrl_t

struct	ulpt_extended_cfg_t

Enumerations
enum	ulpt_clock_t

enum	ulpt_enable_function_t

enum	ulpt_trigger_edge_t

enum	ulpt_event_pin_t

enum	ulpt_output_pin_t

enum	ulpt_pulse_pin_cfg_t

enum	ulpt_match_pin_cfg_t

enum	ulpt_ulptevi_filter_t

Data Structure Documentation

◆ ulpt_instance_ctrl_t

struct ulpt_instance_ctrl_t

Channel control block. DO NOT INITIALIZE. Initialization occurs when timer_api_t::open is called.

◆ ulpt_extended_cfg_t

struct ulpt_extended_cfg_t

Optional ULPT extension data structure.

Data Fields
ulpt_clock_t	count_source	ULPT channel clock source.
ulpt_ulptevi_filter_t	ulptevi_filter	Input filter for ULTPEVI.
ulpt_enable_function_t	enable_function	Counter function when ULPTEE is valid.
ulpt_trigger_edge_t	trigger_edge	Enable trigger edge (start and restart functions only).
ulpt_event_pin_t	event_pin	Event pin (event counting only).
ulpt_pulse_pin_cfg_t	ulpto	Pulse output pin.
union ulpt_extended_cfg_t	__unnamed__

Enumeration Type Documentation

◆ ulpt_clock_t

enum ulpt_clock_t

Count source.

Enumerator
ULPT_CLOCK_LOCO	LOCO count source, division by 1, 2, 4, 8, 16, 32, 64, 128.
ULPT_CLOCK_SUBCLOCK	Subclock count source, division by 1, 2, 4, 8, 16, 32, 64, 128.
ULPT_CLOCK_ULPTEVI	Counts external events on ULPTEVI.

◆ ulpt_enable_function_t

enum ulpt_enable_function_t

Counter mode for event enable.

Enumerator
ULPT_ENABLE_FUNCTION_IGNORED	Always count external events, ignore ULPTEE.
ULPT_ENABLE_FUNCTION_ENABLE_LOW	Event counting is enabled while ULPTEE is low (event counting only).
ULPT_ENABLE_FUNCTION_ENABLE_HIGH	Event counting is enabled while ULPTEE is high (event counting only).
ULPT_ENABLE_FUNCTION_START	Counting is started after ULPTEE.
ULPT_ENABLE_FUNCTION_RESTART	Counting is restarted after ULPTEE.

◆ ulpt_trigger_edge_t

enum ulpt_trigger_edge_t

Enable signal trigger edge for start and restart functions.

Enumerator
ULPT_TRIGGER_EDGE_RISING	Timer enable function occurs on the rising edge of ULPTEE.
ULPT_TRIGGER_EDGE_FALLING	Timer enable function occurs on the falling edge of ULPTEE.
ULPT_TRIGGER_EDGE_BOTH	Timer enable function occurs on any edge of ULPTEE.

◆ ulpt_event_pin_t

enum ulpt_event_pin_t

Event signal pin.

Enumerator
ULPT_EVENT_PIN_RISING	Event count occurs on the rising edge.
ULPT_EVENT_PIN_FALLING	Event count occurs on the falling edge.
ULPT_EVENT_PIN_BOTH	Event count occurs on both edges.

◆ ulpt_output_pin_t

enum ulpt_output_pin_t

Output pins, used to select which duty cycle to update in R_ULPT_DutyCycleSet().

Enumerator
ULPT_OUTPUT_PIN_ULPTOA	Compare match A output.
ULPT_OUTPUT_PIN_ULPTOB	Compare match B output.

◆ ulpt_pulse_pin_cfg_t

enum ulpt_pulse_pin_cfg_t

ULPTO pulse output pin.

Enumerator
ULPT_PULSE_PIN_CFG_DISABLED	Output pin disabled.
ULPT_PULSE_PIN_CFG_ENABLED_START_LEVEL_LOW	Output pin Enabled Start Low.
ULPT_PULSE_PIN_CFG_ENABLED_START_LEVEL_HIGH	Output pin enabled Start Hig.

◆ ulpt_match_pin_cfg_t

enum ulpt_match_pin_cfg_t

ULPT match output pin.

Enumerator
ULPT_MATCH_PIN_CFG_DISABLED	Match output disabled.
ULPT_MATCH_PIN_CFG_START_LEVEL_LOW	Match output enabled, starts low.
ULPT_MATCH_PIN_CFG_START_LEVEL_HIGH	Match output enabled, starts high.

◆ ulpt_ulptevi_filter_t

enum ulpt_ulptevi_filter_t

Input filter, applied to ULPTEVI in event counter mode. The filter requires the signal to be at the same level for 3 successive reads at the specified filter frequency.

Enumerator
ULPT_ULPTEVI_FILTER_NONE	No filter.
ULPT_ULPTEVI_FILTER_PCLKB	Filter at PCLKB.
ULPT_ULPTEVI_FILTER_PCLKB_DIV_8	Filter at PCLKB / 8.
ULPT_ULPTEVI_FILTER_PCLKB_DIV_32	Filter at PCLKB / 32.

Function Documentation

◆ R_ULPT_Open()

fsp_err_t R_ULPT_Open	(	timer_ctrl_t *const	p_ctrl,
		timer_cfg_t const *const	p_cfg
	)

Initializes the ULPT module instance. Implements timer_api_t::open.

The ULPT implementation of the general timer can accept an optional ulpt_extended_cfg_t extension parameter. For ULPT, the extension specifies the clock to be used as timer source and the output pin configurations. If the extension parameter is not specified (NULL), the default clock LOCO is used and the output pins are disabled.

Example:

/* Initializes the module. */

err = R_ULPT_Open(&g_timer0_ctrl, &g_timer0_cfg);

Return values

FSP_SUCCESS	Initialization was successful and timer has started.
FSP_ERR_ASSERTION	A required input pointer is NULL or the period is not in the valid range of 1 to 0xFFFF.
FSP_ERR_ALREADY_OPEN	R_ULPT_Open has already been called for this p_ctrl.
FSP_ERR_IRQ_BSP_DISABLED	A required interrupt has not been enabled in the vector table.
FSP_ERR_IP_CHANNEL_NOT_PRESENT	Requested channel number is not available on ULPT.

◆ R_ULPT_Start()

fsp_err_t R_ULPT_Start ( timer_ctrl_t *const p_ctrl )

Starts timer. Implements timer_api_t::start.

Example:

/* Start the timer. */

(void) R_ULPT_Start(&g_timer0_ctrl);

Return values

FSP_SUCCESS	Timer started.
FSP_ERR_ASSERTION	p_ctrl is null.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

◆ R_ULPT_Stop()

fsp_err_t R_ULPT_Stop ( timer_ctrl_t *const p_ctrl )

Stops the timer. Implements timer_api_t::stop.

Example:

/* (Optional) Stop the timer. This will set the counter back to max */

(void) R_ULPT_Stop(&g_timer0_ctrl);

Return values

FSP_SUCCESS	Timer stopped.
FSP_ERR_ASSERTION	p_ctrl was NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

◆ R_ULPT_Reset()

fsp_err_t R_ULPT_Reset ( timer_ctrl_t *const p_ctrl )

Resets the counter value to the period minus one. Implements timer_api_t::reset.

Return values

FSP_SUCCESS	Counter reset.
FSP_ERR_ASSERTION	p_ctrl is NULL
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

◆ R_ULPT_Enable()

fsp_err_t R_ULPT_Enable ( timer_ctrl_t *const p_ctrl )

Enables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::enable.

Example:

err = R_ULPT_Enable(&g_timer0_ctrl);

Return values

FSP_SUCCESS	External events successfully enabled.
FSP_ERR_ASSERTION	p_ctrl was NULL.
FSP_ERR_NOT_OPEN	The instance is not opened.

◆ R_ULPT_Disable()

fsp_err_t R_ULPT_Disable ( timer_ctrl_t *const p_ctrl )

Disables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::disable.

Example:

err = R_ULPT_Disable(&g_timer0_ctrl);

Return values

FSP_SUCCESS	External events successfully disabled.
FSP_ERR_ASSERTION	p_ctrl was NULL.
FSP_ERR_NOT_OPEN	The instance is not opened.

◆ R_ULPT_PeriodSet()

fsp_err_t R_ULPT_PeriodSet	(	timer_ctrl_t *const	p_ctrl,
		uint32_t const	period_counts
	)

Updates period. The new period is updated immediately and the counter is reset to the maximum value. Implements timer_api_t::periodSet.

Warning: If periodic output is used, the duty cycle buffer registers are updated after the period buffer register. If this function is called while the timer is running and an AGT underflow occurs during processing, the duty cycle will not be the desired 50% duty cycle until the counter underflow after processing completes.; Stop the timer before calling this function if one-shot output is used.

Example:

   /* Set the calculated period. This will return an error if parameter checking is enabled and the calculated
    * period is larger than UINT16_MAX. */
   err = R_ULPT_PeriodSet(&g_timer0_ctrl, period_counts);
   assert(FSP_SUCCESS == err);

Return values

FSP_SUCCESS	Period value updated.
FSP_ERR_ASSERTION	A required pointer was NULL, or the period was not in the valid range of 1 to 0xFFFF.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

◆ R_ULPT_DutyCycleSet()

fsp_err_t R_ULPT_DutyCycleSet	(	timer_ctrl_t *const	p_ctrl,
		uint32_t const	duty_cycle_counts,
		uint32_t const	pin
	)

Updates duty cycle. If the timer is counting, the new duty cycle is reflected after the next counter underflow. Implements timer_api_t::dutyCycleSet.

Example:

   /* Set the calculated duty cycle. */
   err = R_ULPT_DutyCycleSet(&g_timer0_ctrl, duty_cycle_counts, ULPT_OUTPUT_PIN_ULPTOA);
   assert(FSP_SUCCESS == err);

Return values

FSP_SUCCESS	Duty cycle updated.
FSP_ERR_ASSERTION	A required pointer was NULL, or the pin was not ULPT_ULPTO_ULPTOA or ULPT_ULPTO_ULPTOB.
FSP_ERR_INVALID_ARGUMENT	Duty cycle was not in the valid range of 0 to period (counts) - 1
FSP_ERR_NOT_OPEN	The instance control structure is not opened.
FSP_ERR_UNSUPPORTED	ULPT_CFG_OUTPUT_SUPPORT_ENABLE is 0.

◆ R_ULPT_CompareMatchSet()

fsp_err_t R_ULPT_CompareMatchSet	(	timer_ctrl_t *const	p_ctrl,
		uint32_t const	compare_match_value,
		timer_compare_match_t const	match_channel
	)

Placeholder for unsupported compareMatch function. Implements timer_api_t::compareMatchSet.

Return values

FSP_ERR_UNSUPPORTED ULPT compare match is not supported.

◆ R_ULPT_InfoGet()

fsp_err_t R_ULPT_InfoGet	(	timer_ctrl_t *const	p_ctrl,
		timer_info_t *const	p_info
	)

Gets timer information and store it in provided pointer p_info. Implements timer_api_t::infoGet.

Example:

      /* Get the source clock frequency (in Hz).
    *  - Use the R_ULPT_InfoGet function (it accounts for the clock source and divider). */
   if (R_ULPT_InfoGet (&g_timer0_ctrl, &ulptInfo) == FSP_SUCCESS)
   {
       timer_freq_hz = ulptInfo.clock_frequency;
   }

Return values

FSP_SUCCESS	Period, count direction, and frequency stored in p_info.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

◆ R_ULPT_StatusGet()

fsp_err_t R_ULPT_StatusGet	(	timer_ctrl_t *const	p_ctrl,
		timer_status_t *const	p_status
	)

Retrieves the current state and counter value stores them in p_status. Implements timer_api_t::statusGet.

Example:

/* Read the current counter value. Counter value is in status.counter. */

(void) R_ULPT_StatusGet(&g_timer0_ctrl, &status);

Return values

FSP_SUCCESS	Current status and counter value provided in p_status.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

◆ R_ULPT_CallbackSet()

fsp_err_t R_ULPT_CallbackSet	(	timer_ctrl_t *const	p_api_ctrl,
		void()(timer_callback_args_t )	p_callback,
		void const *const	p_context,
		timer_callback_args_t *const	p_callback_memory
	)

Updates the user callback with the option to provide memory for the callback argument structure. Implements timer_api_t::callbackSet.

Return values

FSP_SUCCESS	Callback updated successfully.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened.
FSP_ERR_NO_CALLBACK_MEMORY	p_callback is non-secure and p_callback_memory is either secure or NULL.

◆ R_ULPT_Close()

fsp_err_t R_ULPT_Close ( timer_ctrl_t *const p_ctrl )

Stops counter, disables interrupts, disables output pins, and clears internal driver data. Implements timer_api_t::close.

Return values

FSP_SUCCESS	Timer closed.
FSP_ERR_ASSERTION	p_ctrl is NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

Functions

Detailed Description

Overview

Features

Selecting a Timer

Configuration

Build Time Configurations for r_ulpt

Configurations for Timers > Timer, Ultra-Low-Power (r_ulpt)

Clock Configuration

Pin Configuration

Timer Period

Usage Notes

Starting and Stopping the ULPT

Low Power Modes

One-Shot Mode

Periodic Output

PWM Output

Triggering ELC Events with ULPT

Examples

ULPT Basic Example

ULPT Callback Example

ULPT Free Running Counter Example

ULPT Period Update Example

ULPT Duty Cycle Update Example

Data Structures

Enumerations

Data Structure Documentation

◆ ulpt_instance_ctrl_t

◆ ulpt_extended_cfg_t

Enumeration Type Documentation

◆ ulpt_clock_t

◆ ulpt_enable_function_t

◆ ulpt_trigger_edge_t

◆ ulpt_event_pin_t

◆ ulpt_output_pin_t

◆ ulpt_pulse_pin_cfg_t

◆ ulpt_match_pin_cfg_t

◆ ulpt_ulptevi_filter_t

Function Documentation

◆ R_ULPT_Open()

◆ R_ULPT_Start()

◆ R_ULPT_Stop()

◆ R_ULPT_Reset()

◆ R_ULPT_Enable()

◆ R_ULPT_Disable()

◆ R_ULPT_PeriodSet()

◆ R_ULPT_DutyCycleSet()

◆ R_ULPT_CompareMatchSet()

◆ R_ULPT_InfoGet()

◆ R_ULPT_StatusGet()

◆ R_ULPT_CallbackSet()

◆ R_ULPT_Close()