Functions
fsp_err_t	R_FSP_VersionGet (fsp_pack_version_t *const p_version)

void	Default_Handler (void)

void	SystemInit (void)

void	R_BSP_WarmStart (bsp_warm_start_event_t event)

void	R_BSP_HardwareInit (void)

uint32_t	R_FSP_SystemClockHzGet (fsp_priv_clock_t clock)

void	R_FSP_SystemClockHzSet (fsp_priv_clock_t clock, uint32_t clock_sel, uint32_t clock_div)

fsp_err_t	R_BSP_ClockSelectorSet (fsp_priv_clock_selector_t selector, uint32_t clock_sel)

fsp_err_t	R_BSP_ClockDividerSet (fsp_priv_clock_divider_t divider, uint32_t clock_div)

__STATIC_INLINE fsp_err_t	R_FSP_CurrentIrqGet (void)

__STATIC_INLINE fsp_err_t	R_BSP_UniqueIdGet ()

BSP_SECTION_FLASH_GAP void	R_BSP_SoftwareDelay (uint32_t delay, bsp_delay_units_t units)

BSP_SECTION_FLASH_GAP fsp_err_t	R_BSP_GroupIrqWrite (bsp_grp_irq_t irq, void(*p_callback)(bsp_grp_irq_t irq))

void	R_BSP_CACHE_CleanAll (void)

void	R_BSP_CACHE_CleanInvalidateAll (void)

void	R_BSP_CACHE_InvalidateAll (void)

void	R_BSP_CACHE_CleanRange (uint64_t base_address, uint64_t length)

void	R_BSP_CACHE_InvalidateRange (uint64_t base_address, uint64_t length)

void	R_BSP_CACHE_CleanInvalidateRange (uint64_t base_address, uint64_t length)

__STATIC_INLINE void	R_BSP_TLB_Invalidate (void)

BSP_TFU_INLINE float	__sinf (float angle)

BSP_TFU_INLINE float	__cosf (float angle)

BSP_TFU_INLINE void	__sincosf (float angle, float sin, float cos)

BSP_TFU_INLINE float	__atan2f (float y_cord, float x_cord)

BSP_TFU_INLINE float	__hypotf (float x_cord, float y_cord)

BSP_TFU_INLINE void	__atan2hypotf (float y_cord, float x_cord, float atan2, float hypot)

Detailed Description

The BSP is responsible for getting the MPU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, clocks, interrupts, C runtime environment, and stack monitor.

BSP Features
BSP Clock Configuration
BSP Weak Symbols
Warm Start Callbacks
C Runtime Initialization
Heap Allocation
Error Logging
Software Delay
Critical Section Macros
Data transfer to RAM at startup
Cache operation
Configuration

Overview

BSP Features

BSP Clock Configuration

All system clocks are set up during BSP initialization based on the settings in bsp_clock_cfg.h. These settings are derived from clock configuration information provided from the Configuration editor Clocks tab.

Clock configuration is performed prior to initializing the C runtime environment to speed up the startup process.
The BSP will configure the CMSIS SystemCoreClock variable after clock initialization with the current system clock frequency.

BSP Weak Symbols

The weak attribute causes the declaration to be emitted as a weak symbol rather than a global. A weak symbol is one that can be overridden by an accompanying strong reference with the same name. When the BSP declares a function as weak, user code can define the same function and it will be used in place of the BSP function.

Weak symbols are supported for ELF targets and also for a.out targets when using the GNU assembler and linker.

Note that in CMSIS system.c, there is also a weak definition (and a function body) for the Warm Start callback function R_BSP_WarmStart(). Because this function is defined in the same file as the weak declaration, it will be called as the 'default' implementation. The function may be overridden by the user by copying the body into their user application and modifying it as necessary. The linker identifies this as the 'strong' reference and uses it.

Warm Start Callbacks

As the BSP is in the process of bringing up the board out of reset, there are three points where the user can request a callback. These are defined as the 'Pre Clock Init', 'Post Clock Init' and 'Post C' warm start callbacks.

As described above, this function is already weakly defined as R_BSP_WarmStart(), so it is a simple matter of redefining the function or copying the existing body from CMSIS system.c into the application code to get a callback. R_BSP_WarmStart() takes an event parameter of type bsp_warm_start_event_t which describes the type of warm start callback being made.

This function is not enabled/disabled and is always called for both events as part of the BSP startup. Therefore it needs a function body, which will not be called if the user is overriding it. The function body is located in system.c. To use this function just copy this function into your own code and modify it to meet your needs.

C Runtime Initialization

This BSP configuration allows the user to skip the FSP C runtime initialization code by setting the "C Runtime Initialization" to "Disabled" on the BSP tab of the Configuration editor. Disabling this option is useful in cases where a non-standard linker script is being used or other modifications to the runtime initialization are desired. If this macro is disabled, the user must use the 'Post Clock Init' event from the warm start (described above) to run their own runtime initialization code.

Heap Allocation

The relatively low amount of on-chip SRAM available and lack of memory protection in an MPU means that heap use must be very carefully controlled to avoid memory leaks, overruns and attempted overallocation. Further, many RTOSes provide their own dynamic memory allocation system. For these reasons the default heap size is set at 0 bytes, effectively disabling dynamic memory. If it is required for an application setting a positive value to the "Heap size (bytes)" option in the Common configurations on the BSP tab will allocate a heap.

Note: When using printf/sprintf (and other variants) to output floating point numbers a heap is required. A minimum size of 0x1000 (4096) bytes is recommended when starting development in this case.

Error Logging

When error logging is enabled, the error logging function can be redefined on the command line by defining FSP_ERROR_LOG(err) to the desired function call. The default function implementation is FSP_ERROR_LOG(err)=fsp_error_log(err, FILE, LINE). This implementation uses the predefined macros FILE and LINE to help identify the location where the error occurred. Removing the line from the function call can reduce code size when error logging is enabled. Some compilers may support other predefined macros like FUNCTION, which could be helpful for customizing the error logger.

Software Delay

Implements a blocking software delay. A delay can be specified in microseconds, milliseconds or seconds.

    /* Delay at least 1 second. Depending on the number of wait states required for the region of memory
     * that the software_delay_loop has been linked in this could take longer.
     * If you want to adjust the waiting time, redefine DELAY_LOOP_CYCLES.
     * You can specify the following three types of units for the second argument.
     *   BSP_DELAY_UNITS_SECONDS
     *   BSP_DELAY_UNITS_MILLISECONDS
     *   BSP_DELAY_UNITS_MICROSECONDS */
    R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_SECONDS);

Critical Section Macros

Implements a critical section. Some MPUs (MPU that handles interrupts with a GIC that has an Interrupt Priority Mask Register) support allowing high priority interrupts to execute during critical sections. On these MPUs, interrupts with priority less than or equal to BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION are not serviced in critical sections. Interrupts with higher priority than BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION still execute in critical sections.

    FSP_CRITICAL_SECTION_DEFINE;
    /* Store the current interrupt posture. */
    FSP_CRITICAL_SECTION_ENTER;
    /* Interrupts cannot run in this section unless their priority is less than BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION. */
    /* Restore saved interrupt posture. */
    FSP_CRITICAL_SECTION_EXIT;

Data transfer to RAM at startup

After starting FSP, the memory copy process is executed according to the rules described in sections.c of the src folder. The implementation of sections.c is described below. User can modify existing memory initialization rules and add new rules.

Default copy settings

sections.c generated by creating a new project performs the following operations by default.

Action	From	To	Size	When
Copy	__sram_load_start	__sram_exec_start	__sram_load_end - __sram_load_start	End of Reset_Handler
Copy	__data_load_start	__data_exec_start	__data_load_end - __data_load_start	End of Reset_Handler(If you choose the eXecute-In-Place board pack)
Initialize to Zero	__bss_start	-	__bss_end - __bss_start	End of Reset_Handler
Initialize to Zero	__bss2_start	-	__bss2_end - __bss2_start	End of Reset_Handler

The above symbols are defined in the linker script.

Tables describing memory initialization rules

There are four tables in sections.c: Select the table to use according to the copy conditions.

Table name	Action	When
DTBL_F	Take a copy action on the specified memory.	The action is executed in the first half of Reset_Handler.
DTBL	Take a copy action on the specified memory.	The action is executed in the end part of Reset_Handler.
BTBL_F	Take a zero assignment action on the specified memory.	The action is executed in the first half of Reset_Handler.
BTBL	Take a zero assignment action on the specified memory.	The action is executed in the end part of Reset_Handler.

DTBL and BTBL are used for the normal program area. If there is an area to be used in the subroutine called from Reset_Handler, use DTBL_F and BTBL_F.

Format of Copy Memory Table (DTBL_F, DTBL)

The table represents one copy rule in one row. The size of the array is variable length, and the end is determined by all zero row. The elements on one line are "Top address on ROM", "Bottom address on ROM", "Top address on RAM" in order from the left, and the input rules are shown below.

Elements	Description
Top address on ROM	Start address of copy source area. Usually refers to the area on the flash ROM.
Bottom address on ROM	End address of copy source area.
Top address on RAM	Start address of copy destination area. Usually refers to the area on the DDR.

Format of Initialize to Zero Table (BTBL_F, BTBL)

The table represents one zero assignment rule in one row. The size of the array is variable length, and the end is determined by all zero row. The elements on one line are "Top address", "Bottom address" in order from the left, and the input rules are shown below.

Elements	Description
Top address	Start address of zero assignment area.
Bottom address	End address of zero assignment area.

Cache operation

The following functions in this BSP perform CLEAN and INVALIDATE data cache operations.

R_BSP_CACHE_InvalidateAll
R_BSP_CACHE_InvalidateRange

This behaviour comes from the MPU spec that cleaning data cache is automatically performed when invalidating it. That means there is no way to only invalidate data cache. Please keep this spec into your mind when developing application.

Therefore, when using memory shared by CPU and bus-master modules, please place the memory in non-cached area. For example, when using SDHI, Gether, USB, CRU, LCDC and DMA drivers, please consider specifying non-cached area for the buffer used in the drivers.

/*
 *  To create a buffer in the non-cached area, specify the section below in the variable definition.
 *  Note: Only variables without initial values can be created. */
g_uncached_buffer[UNCACHED_BUFFER_SIZE] __attribute__((section("UNCACHED_BSS")));
void bsp_example_set_physical_address (void)
{
#if (BSP_HAS_MMU_SUPPORT)
    uint64_t pa;                       /* Physical Address */
    uint64_t va;                       /* Virtual Address */
#endif
    /* When writing an address to a bus master register, use the address translation function to convert the virtual address
     * to a physical address before writing. */
#if (BSP_HAS_MMU_SUPPORT)
    va = (uint64_t) (void *) g_uncached_buffer;
    R_MMU_VAtoPA(&g_mmu_ctrl, va, (void *) &pa);
    preg->WRITE_ADR_REGISTER = pa;
#else
    preg->WRITE_ADR_REGISTER = (uint32_t) g_uncached_buffer;
#endif
}

Configuration

The BSP is heavily data driven with most features and functionality being configured based on the content from configuration files. Configuration files represent the settings specified by the user and are generated when the project is built and/or when the Generate Project Content button is clicked in the Configuration editor.

Build Time Configurations for fsp_common

The following build time configurations are defined in fsp_cfg/bsp/bsp_cfg.h:

Configuration	Options	Default	Description
Secure stack size (bytes)	Value must be an integer multiple of 8 and between 8 and 0xFFFFFFFF	0x200	Set the size of the secure program stack. NOTE: This entry is for the secure stack.
Main stack size (bytes)	Value must be an integer multiple of 8 and between 8 and 0xFFFFFFFF	0x200	Set the size of the main program stack. NOTE: This entry is for the main stack. When using an RTOS, thread stacks can be configured in the properties for each thread.
Heap size (bytes)	Value must be 0 or an integer multiple of 8 between 8 and 0xFFFFFFFF.	0	The main heap is disabled by default. Set the heap size to a positive integer divisible by 8 to enable it. A minimum of 4K (0x1000) is recommended if standard library functions are to be used.
MCU Vcc (mV)	Value must between 0 and 5500 (5.5V)	3300	Some peripherals require different settings based on the supplied voltage. Entering Vcc here (in mV) allows the relevant driver modules to configure the associated peripherals accordingly.
Parameter checking	Enabled Disabled	Disabled	When enabled, parameter checking for the BSP is turned on. In addition, any modules whose parameter checking configuration is set to 'Default (BSP)' will perform parameter checking as well.
Assert Failures	Return FSP_ERR_ASSERTION Call fsp_error_log then Return FSP_ERR_ASSERTION Use assert() to Halt Execution Disable checks that would return FSP_ERR_ASSERTION	Return FSP_ERR_ASSERTION	Define the behavior of the FSP_ASSERT() macro.
Error Log	No Error Log Errors Logged via fsp_error_log	No Error Log	Specify error logging behavior.
PFS Protect	Disabled Enabled	Enabled	Keep the PFS registers locked when they are not being modified. If disabled they will be unlocked during startup.
C Runtime Initialization	Enabled Disabled	Enabled	Select if the C runtime initialization in the BSP is to be used. If disabled, use the BSP_WARM_START_POST_CLOCK event to run user defined equivalent.

Modules
	RZA3UL

Macros
#define	R_BSP_MODULE_CLKON(ip, channel)

#define	R_BSP_MODULE_CLKOFF(ip, channel)

#define	R_BSP_MODULE_RSTON(ip, channel)

#define	R_BSP_MODULE_RSTOFF(ip, channel)

#define	BSP_IRQ_DISABLED

#define	FSP_LOG_PRINT(X)

#define	FSP_RETURN(err)

#define	FSP_ERROR_LOG(err)

#define	FSP_ASSERT(a)

#define	FSP_ERROR_RETURN(a, err)

#define	FSP_CRITICAL_SECTION_ENTER

#define	FSP_CRITICAL_SECTION_EXIT

#define	FSP_INVALID_VECTOR

#define	BSP_CFG_HANDLE_UNRECOVERABLE_ERROR(x)

#define	BSP_STACK_ALIGNMENT

#define	R_BSP_MSTP_START(ip, channel)

#define	R_BSP_MSTP_STOP(ip, channel)

Enumerations
enum	bsp_warm_start_event_t

enum	bsp_delay_units_t

enum	bsp_grp_irq_t

Variables
uint32_t SystemCoreClock	BSP_SECTION_EARLY_INIT

Macro Definition Documentation

◆ R_BSP_MODULE_CLKON

#define R_BSP_MODULE_CLKON	(	ip,
		channel
	)

Start clock supply

Parameters

ip	fsp_ip_t enum value for the clock is supplied.
channel	The channel. Use ch 0 for ips without channels. Only single bit can be set.

◆ R_BSP_MODULE_CLKOFF

#define R_BSP_MODULE_CLKOFF	(	ip,
		channel
	)

Stop clock supply

Parameters

ip	fsp_ip_t enum value for the ip to stop clock.
channel	The channel. Use ch 0 for ips without channels. Only single bit can be set.

◆ R_BSP_MODULE_RSTON

#define R_BSP_MODULE_RSTON	(	ip,
		channel
	)

Reset ip

Parameters

ip	fsp_ip_t enum value for the ip to be reset.
channel	The channel. Use ch 0 for ips without channels. Only single bit can be set.

◆ R_BSP_MODULE_RSTOFF

#define R_BSP_MODULE_RSTOFF	(	ip,
		channel
	)

Reset ip

Parameters

ip	fsp_ip_t enum value for the ip to be reset.
channel	The channel. Use ch 0 for ips without channels. Only single bit can be set.

◆ BSP_IRQ_DISABLED

#define BSP_IRQ_DISABLED

Used to signify that an ELC event is not able to be used as an interrupt.

◆ FSP_LOG_PRINT

#define FSP_LOG_PRINT ( X )

Macro that can be defined in order to enable logging in FSP modules.

◆ FSP_RETURN

#define FSP_RETURN ( err )

Macro to log and return error without an assertion.

◆ FSP_ERROR_LOG

#define FSP_ERROR_LOG ( err )

This function is called before returning an error code. To stop on a runtime error, define fsp_error_log in user code and do required debugging (breakpoints, stack dump, etc) in this function.

◆ FSP_ASSERT

#define FSP_ASSERT ( a )

Default assertion calls FSP_ERROR_RETURN if condition "a" is false. Used to identify incorrect use of API's in FSP functions.

◆ FSP_ERROR_RETURN

#define FSP_ERROR_RETURN	(	a,
		err
	)

All FSP error codes are returned using this macro. Calls FSP_ERROR_LOG function if condition "a" is false. Used to identify runtime errors in FSP functions.

◆ FSP_CRITICAL_SECTION_ENTER

#define FSP_CRITICAL_SECTION_ENTER

This macro temporarily saves the current interrupt state and disables interrupts.

◆ FSP_CRITICAL_SECTION_EXIT

#define FSP_CRITICAL_SECTION_EXIT

This macro restores the previously saved interrupt state, reenabling interrupts.

◆ FSP_INVALID_VECTOR

#define FSP_INVALID_VECTOR

Used to signify that the requested IRQ vector is not defined in this system.

◆ BSP_CFG_HANDLE_UNRECOVERABLE_ERROR

#define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR ( x )

In the event of an unrecoverable error the BSP will by default call the __BKPT() intrinsic function which will alert the user of the error. The user can override this default behavior by defining their own BSP_CFG_HANDLE_UNRECOVERABLE_ERROR macro.

◆ BSP_STACK_ALIGNMENT

#define BSP_STACK_ALIGNMENT

Stacks (and heap) must be sized and aligned to an integer multiple of this number.

◆ R_BSP_MSTP_START

#define R_BSP_MSTP_START	(	ip,
		channel
	)

Cancels the module stop state.

Parameters

ip	fsp_ip_t enum value for the module to be started
channel	The channel. Use channel 0 for modules without channels.

◆ R_BSP_MSTP_STOP

#define R_BSP_MSTP_STOP	(	ip,
		channel
	)

Enables the module stop state.

Parameters

ip	fsp_ip_t enum value for the module to be stopped
channel	The channel. Use channel 0 for modules without channels.

Enumeration Type Documentation

◆ bsp_warm_start_event_t

enum bsp_warm_start_event_t

Different warm start entry locations in the BSP.

Enumerator
BSP_WARM_START_RESET	Called almost immediately after reset. No C runtime environment, clocks, or IRQs.
BSP_WARM_START_POST_CLOCK	Called after clock initialization. No C runtime environment or IRQs.
BSP_WARM_START_POST_C	Called after clocks and C runtime environment have been set up.

◆ bsp_delay_units_t

enum bsp_delay_units_t

Available delay units for R_BSP_SoftwareDelay(). These are ultimately used to calculate a total # of microseconds

Enumerator
BSP_DELAY_UNITS_SECONDS	Requested delay amount is in seconds.
BSP_DELAY_UNITS_MILLISECONDS	Requested delay amount is in milliseconds.
BSP_DELAY_UNITS_MICROSECONDS	Requested delay amount is in microseconds.

◆ bsp_grp_irq_t

enum bsp_grp_irq_t

Which interrupts can have callbacks registered.

Enumerator
BSP_GRP_IRQ_UNSUPPORTED	NMI Group IRQ are not supported in RZ/A3UL.

Function Documentation

◆ R_FSP_VersionGet()

fsp_err_t R_FSP_VersionGet ( fsp_pack_version_t *const p_version )

Get the FSP version based on compile time macros.

Parameters

[out] p_version Memory address to return version information to.

Return values

FSP_SUCCESS	Version information stored.
FSP_ERR_ASSERTION	The parameter p_version is NULL.

◆ Default_Handler()

BSP_SECTION_FLASH_GAP void Default_Handler ( void )

Default exception handler.

◆ SystemInit()

void SystemInit ( void )

Initialize the MCU and the runtime environment.

◆ R_BSP_WarmStart()

void R_BSP_WarmStart ( bsp_warm_start_event_t event )

This function is called at various points during the startup process. This function is declared as a weak symbol higher up in this file because it is meant to be overridden by a user implemented version. One of the main uses for this function is to call functional safety code during the startup process. To use this function just copy this function into your own code and modify it to meet your needs.

Parameters

[in] event Where the code currently is in the start up process

◆ R_BSP_HardwareInit()

void R_BSP_HardwareInit ( void )

Function Name: R_BSP_HardwareInit This function is called at various points during the startup process. This function is declared as a weak symbol higher up in this file because it is meant to be overridden by a user implemented version. One of the main uses for this function is to call functional safety code during the startup process. To use this function just copy this function into your own code and modify it to meet your needs.

◆ R_FSP_SystemClockHzGet()

uint32_t R_FSP_SystemClockHzGet ( fsp_priv_clock_t clock )

Get a clock frequency.

Parameters

[in] clock Element number of the array that defines the frequency of each clock.

Return values

g_clock_freq[clock] Clock frequency.

◆ R_FSP_SystemClockHzSet()

void R_FSP_SystemClockHzSet	(	fsp_priv_clock_t	clock,
		uint32_t	clock_sel,
		uint32_t	clock_div
	)

DEPRECATED: Set a clock frequency.

Parameters

[in]	clock	Element number of the array that defines the frequency of each clock.
[in]	clock_sel	Value to set in Source Clock Setting register.
[in]	clock_div	Value to set in Division Ratio Setting register.

◆ R_BSP_ClockSelectorSet()

fsp_err_t R_BSP_ClockSelectorSet	(	fsp_priv_clock_selector_t	selector,
		uint32_t	clock_sel
	)

Set a clock selector.

Parameters

[in]	selector	Element number of the array that defines the clock selector.
[in]	clock_sel	Value to set in Mux Control register.

Return values

FSP_SUCCESS	Selector configuration changes completed.
FSP_ERR_INVALID_ARGUMENT	Undefined selector specified.
FSP_ERR_PLL_SRC_INACTIVE	Clock source PLL is reset state.

Note: This function assumes that a source clock is supplied. If the source clock is not supplied, the selector setting process cannot be completed successfully.

◆ R_BSP_ClockDividerSet()

fsp_err_t R_BSP_ClockDividerSet	(	fsp_priv_clock_divider_t	divider,
		uint32_t	clock_div
	)

Set a clock division ratio.

Parameters

[in]	divider	Element number of the array that defines the clock divider.
[in]	clock_div	Value to set in Gear Control register.

Return values

FSP_SUCCESS	Divider configuration changes completed.
FSP_ERR_INVALID_ARGUMENT	Undefined divider specified.
FSP_ERR_PLL_SRC_INACTIVE	Clock source PLL is reset state.

Note: This function assumes that a source clock is supplied. If the source clock is not supplied, the divider setting process cannot be completed successfully.

◆ R_FSP_CurrentIrqGet()

__STATIC_INLINE fsp_err_t R_FSP_CurrentIrqGet ( void )

Return active interrupt vector number value

Returns: Active interrupt vector number value

◆ R_BSP_UniqueIdGet()

__STATIC_INLINE fsp_err_t R_BSP_UniqueIdGet ( )

Get unique ID is not supported for this RZ MCU.

Returns: A pointer to the unique identifier structure

◆ R_BSP_SoftwareDelay()

BSP_SECTION_FLASH_GAP void R_BSP_SoftwareDelay	(	uint32_t	delay,
		bsp_delay_units_t	units
	)

Delay for at least the specified duration in units and return.

Parameters

[in]	delay	The number of 'units' to delay.
[in]	units	The 'base' (bsp_delay_units_t) for the units specified. Valid values are: BSP_DELAY_UNITS_SECONDS, BSP_DELAY_UNITS_MILLISECONDS, BSP_DELAY_UNITS_MICROSECONDS. For example: At 1 MHz one cycle takes 1 microsecond (.000001 seconds). At 12 MHz one cycle takes 1/12 microsecond or 83 nanoseconds. Therefore one run through bsp_prv_software_delay_loop() takes: ~ (83 * BSP_DELAY_LOOP_CYCLES) or 332 ns. A delay of 2 us therefore requires 2000ns/332ns or 6 loops.

The 'theoretical' maximum delay that may be obtained is determined by a full 32 bit loop count and the system clock rate. @120MHz: ((0xFFFFFFFF loops * 4 cycles /loop) / 120000000) = 143 seconds. @32MHz: ((0xFFFFFFFF loops * 4 cycles /loop) / 32000000) = 536 seconds

Note that requests for very large delays will be affected by rounding in the calculations and the actual delay achieved may be slightly longer. @32 MHz, for example, a request for 532 seconds will be closer to 536 seconds.

Note also that if the calculations result in a loop_cnt of zero, the bsp_prv_software_delay_loop() function is not called at all. In this case the requested delay is too small (nanoseconds) to be carried out by the loop itself, and the overhead associated with executing the code to just get to this point has certainly satisfied the requested delay.

Note: This function uses SystemCoreClock and therefore requires that the BSP has already initialized the CGC (which it does as part of the Sysinit). Care should be taken to ensure this remains the case if in the future this function were to be called as part of the BSP initialization.

◆ R_BSP_GroupIrqWrite()

BSP_SECTION_FLASH_GAP fsp_err_t R_BSP_GroupIrqWrite	(	bsp_grp_irq_t	irq,
		void(*)(bsp_grp_irq_t irq)	p_callback
	)

Register a callback function for supported interrupts. If NULL is passed for the callback argument then any previously registered callbacks are unregistered.

Parameters

[in]	irq	Interrupt for which to register a callback.
[in]	p_callback	Pointer to function to call when interrupt occurs.

Return values

FSP_ERR_UNSUPPORTED NMI Group IRQ are not supported in RZ/A3UL.

◆ R_BSP_CACHE_CleanAll()

void R_BSP_CACHE_CleanAll ( void )

Clean whole cache.

Execute DC CSW instruction for all set/way of cache.

Note: DC CSW instructions in AArch64 perform both a clean and invalidate of the target set/way.

◆ R_BSP_CACHE_CleanInvalidateAll()

void R_BSP_CACHE_CleanInvalidateAll ( void )

Clean&Invalidate whole cache.

Execute DC CISW instruction for all set/way of cache.

◆ R_BSP_CACHE_InvalidateAll()

void R_BSP_CACHE_InvalidateAll ( void )

Invalidate whole cache.

Execute DC ISW instruction for all set/way of cache.

Note: DC ISW instructions in AArch64 perform both a clean and invalidate of the target set/way.

◆ R_BSP_CACHE_CleanRange()

void R_BSP_CACHE_CleanRange	(	uint64_t	base_address,
		uint64_t	length
	)

Cache Clean by MVA.

Parameters

[in]	base_address	start address (Must be a 4-byte aligned address)
[in]	length	number of bytes (Must be a multiple of 4)

Executes DC CVAC and IC IVAU instruction for cache lines within the specified address range.

◆ R_BSP_CACHE_InvalidateRange()

void R_BSP_CACHE_InvalidateRange	(	uint64_t	base_address,
		uint64_t	length
	)

Cache Invalidate by MVA.

Parameters

[in]	base_address	start address (Must be a 4-byte aligned address)
[in]	length	number of bytes (Must be a multiple of 4)

Executes DC IVAC and IC IVAU instruction for cache lines within the specified address range.

Note: DC IVAC instructions in AArch64 perform both a clean and invalidate.

◆ R_BSP_CACHE_CleanInvalidateRange()

void R_BSP_CACHE_CleanInvalidateRange	(	uint64_t	base_address,
		uint64_t	length
	)

Cache Clean&Invalidate by MVA.

Parameters

[in]	base_address	start address (Must be a 4-byte aligned address)
[in]	length	number of bytes (Must be a multiple of 4)

Executes DC CIVAC and IC IVAU instruction for cache lines within the specified address range.

◆ R_BSP_TLB_Invalidate()

__STATIC_INLINE void R_BSP_TLB_Invalidate ( void )

TLB Invalidate All, EL3

Invalidates cached copies of translation table entries from TLBs

◆ __sinf()

BSP_TFU_INLINE float __sinf ( float angle )

Calculates sine of the given angle.

Parameters

[in] angle The value of an angle in radian.

Return values

Sine	value of an angle.

◆ __cosf()

BSP_TFU_INLINE float __cosf ( float angle )

Calculates cosine of the given angle.

Parameters

[in] angle The value of an angle in radian.

Return values

Cosine value of an angle.

◆ __sincosf()

BSP_TFU_INLINE void __sincosf	(	float	angle,
		float *	sin,
		float *	cos
	)

Calculates sine and cosine of the given angle.

Parameters

[in]	angle	The value of an angle in radian.
[out]	sin	Sine value of an angle.
[out]	cos	Cosine value of an angle.

◆ __atan2f()

BSP_TFU_INLINE float __atan2f	(	float	y_cord,
		float	x_cord
	)

Calculates the arc tangent based on given X-cordinate and Y-cordinate values.

Parameters

[in]	y_cord	Y-Axis cordinate value.
[in]	x_cord	X-Axis cordinate value.

Return values

Arc	tangent for given values.

◆ __hypotf()

BSP_TFU_INLINE float __hypotf	(	float	x_cord,
		float	y_cord
	)

Calculates the hypotenuse based on given X-cordinate and Y-cordinate values.

Parameters

[in]	y_cord	Y-cordinate value.
[in]	x_cord	X-cordinate value.

Return values

Hypotenuse for given values.

◆ __atan2hypotf()

BSP_TFU_INLINE void __atan2hypotf	(	float	y_cord,
		float	x_cord,
		float *	atan2,
		float *	hypot
	)

Calculates the arc tangent and hypotenuse based on given X-cordinate and Y-cordinate values.

Parameters

[in]	y_cord	Y-cordinate value.
[in]	x_cord	X-cordinate value.
[out]	atan2	Arc tangent for given values.
[out]	hypot	Hypotenuse for given values.

Variable Documentation

◆ BSP_SECTION_EARLY_INIT

uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT

System Clock Frequency (Core Clock)

Functions

Detailed Description

Overview

BSP Features

BSP Clock Configuration

BSP Weak Symbols

Warm Start Callbacks

C Runtime Initialization

Heap Allocation

Error Logging

Software Delay

Critical Section Macros

Data transfer to RAM at startup

Default copy settings

Tables describing memory initialization rules

Format of Copy Memory Table (DTBL_F, DTBL)

Format of Initialize to Zero Table (BTBL_F, BTBL)

Cache operation

Configuration

Build Time Configurations for fsp_common

Modules

Macros

Enumerations

Variables

Macro Definition Documentation

◆ R_BSP_MODULE_CLKON

◆ R_BSP_MODULE_CLKOFF

◆ R_BSP_MODULE_RSTON

◆ R_BSP_MODULE_RSTOFF

◆ BSP_IRQ_DISABLED

◆ FSP_LOG_PRINT

◆ FSP_RETURN

◆ FSP_ERROR_LOG

◆ FSP_ASSERT

◆ FSP_ERROR_RETURN

◆ FSP_CRITICAL_SECTION_ENTER

◆ FSP_CRITICAL_SECTION_EXIT

◆ FSP_INVALID_VECTOR

◆ BSP_CFG_HANDLE_UNRECOVERABLE_ERROR

◆ BSP_STACK_ALIGNMENT

◆ R_BSP_MSTP_START

◆ R_BSP_MSTP_STOP

Enumeration Type Documentation

◆ bsp_warm_start_event_t

◆ bsp_delay_units_t

◆ bsp_grp_irq_t

Function Documentation

◆ R_FSP_VersionGet()

◆ Default_Handler()

◆ SystemInit()

◆ R_BSP_WarmStart()

◆ R_BSP_HardwareInit()

◆ R_FSP_SystemClockHzGet()

◆ R_FSP_SystemClockHzSet()

◆ R_BSP_ClockSelectorSet()

◆ R_BSP_ClockDividerSet()

◆ R_FSP_CurrentIrqGet()

◆ R_BSP_UniqueIdGet()

◆ R_BSP_SoftwareDelay()

◆ R_BSP_GroupIrqWrite()

◆ R_BSP_CACHE_CleanAll()

◆ R_BSP_CACHE_CleanInvalidateAll()

◆ R_BSP_CACHE_InvalidateAll()

◆ R_BSP_CACHE_CleanRange()

◆ R_BSP_CACHE_InvalidateRange()

◆ R_BSP_CACHE_CleanInvalidateRange()

◆ R_BSP_TLB_Invalidate()

◆ __sinf()

◆ __cosf()

◆ __sincosf()

◆ __atan2f()

◆ __hypotf()

◆ __atan2hypotf()

Variable Documentation

◆ BSP_SECTION_EARLY_INIT