Functions
fsp_err_t	R_ETHER_PHY_Open (ether_phy_ctrl_t const p_ctrl, ether_phy_cfg_t const const p_cfg)

fsp_err_t	R_ETHER_PHY_Close (ether_phy_ctrl_t *const p_ctrl)

fsp_err_t	R_ETHER_PHY_ChipInit (ether_phy_ctrl_t const p_ctrl, ether_phy_cfg_t const const p_cfg)
	Initialize Ethernet PHY device. Implements ether_phy_api_t::chipInit. More...

fsp_err_t	R_ETHER_PHY_Read (ether_phy_ctrl_t const p_ctrl, uint32_t reg_addr, uint32_t const p_data)
	Read data from register of PHY-LSI . Implements ether_phy_api_t::read. More...

fsp_err_t	R_ETHER_PHY_Write (ether_phy_ctrl_t *const p_ctrl, uint32_t reg_addr, uint32_t data)
	Write data to register of PHY-LSI . Implements ether_phy_api_t::write. More...

fsp_err_t	R_ETHER_PHY_StartAutoNegotiate (ether_phy_ctrl_t *const p_ctrl)

fsp_err_t	R_ETHER_PHY_LinkPartnerAbilityGet (ether_phy_ctrl_t const p_ctrl, uint32_t const p_line_speed_duplex, uint32_t const p_local_pause, uint32_t const p_partner_pause)

fsp_err_t	R_ETHER_PHY_LinkStatusGet (ether_phy_ctrl_t *const p_ctrl)

Detailed Description

The Ethernet PHY module (r_ether_phy) provides an API for standard Ethernet PHY communications applications. It implements the Ethernet PHY Interface.

Overview

The Ethernet PHY module is used to setup and manage an external Ethernet PHY device for use with the on-chip Ethernet MAC (GMAC), Ethernet Switch (ETHSW) or EtherCAT Slave Controller (ESC) peripheral. The connection parameters between link partners can be determined by auto-negotiation, or can specify fixed values. Once initialized the connection between the external PHY and the onboard controller is automatically managed in hardware.

Features

The Ethernet PHY module supports the following features:

Auto negotiation support
Fixed connection parameters support
Link status check support

Configuration

Build Time Configurations for r_ether_phy

The following build time configurations are defined in fsp_cfg/r_ether_phy_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.
VSC8541 Target	Disabled Enabled	Disabled	Select whether to use VSC8541 Phy LSI or not.
KSZ9131 Target	Disabled Enabled	Disabled	Select whether to use KSZ9131 Phy LSI or not.
KSZ9031 Target	Disabled Enabled	Disabled	Select whether to use KSZ9031 Phy LSI or not.
KSZ8081 Target	Disabled Enabled	Disabled	Select whether to use KSZ8081 Phy LSI or not.
KSZ8041 Target	Disabled Enabled	Disabled	Select whether to use KSZ8041 Phy LSI or not.
User Own Target	Disabled Enabled	Disabled	Select whether to use User own Phy LSI or not.

Configurations for Networking > Ethernet (r_ether_phy)

This module can be added to the Stacks tab via New Stack > Networking > Ethernet (r_ether_phy).

Configuration	Options	Default	Description
Name	Name must be a valid C symbol	g_ether_phy0	Module name.
Channel	0 1 2 3	0	Select the Ethernet controller channel number.
PHY-LSI Address	Specify a value between 0 and 31.	0	Specify the address of the PHY-LSI used.
PHY-LSI Reset Completion Timeout	Specify a value between 0x1 and 0xFFFFFFFF.	0x00020000	Specify the number of times to read the PHY-LSI control register while waiting for reset completion. This value should be adjusted experimentally based on the PHY-LSI used.
Flow Control	Disable Enable	Disable	Select whether to enable or disable flow control.
Port Type	Ethernet EtherCAT	Ethernet	Specify whether to use Ethernet or EtherCAT.
Phy LSI type	Kit Component DEFAULT VSC8541 KSZ9131 KSZ9031 KSZ8081 KSZ8041 User own PHY	Kit Component	Select the Phy LSI target. Selecting 'Kit Component' will automatically choose the correct option when using a Renesas development board.
Port Custom Init Function	Name must be a valid C symbol	NULL	Set the initial function of the PHY-LSI, When using your own PHY-LSI.
Select MDIO type	GMAC ETHSW ESC GMAC1 GMAC2	GMAC	Select MDIO type to use.
Auto Negotiation	OFF ON	ON	Select whether to ON or OFF auto negotiation.
Speed	10/100M 10/100/1000M 10M 100M 1000M	10/100/1000M	Select the link spped.
Duplex	HALF FULL	FULL	Select whether to HALF or FULL duplex.
Reset Port	Refer to the RZT Configuration tool for available options.	20	Specify port number of pin control for PHY reset in the MCU.
Reset Pin	0 1 2 3 4 5 6 7	7	Specify pin number of pin control for PHY reset in the MCU.
Reset assert time	Specify a value between 0x1 and 0x7FFFFFFF.	15000	Specify reset assert time in microsecond.

Accessing the MII and RMII Registers

The PHY-LSY is controlled using the MII / GMII interface of the on-chip Ethernet MAC (GMAC), Ethernet switch (ETHSW), or EtherCAT slave controller (ESC) peripheral.

MII and RMII management frame format

The below table lists the MII and RMII management frame formats.

Access type		MII and RMII management frame
	Item	PRE	ST	OP	PHYAD	REGAD	TA	DATA	IDLE
	Number of bits	32	2	2	5	5	2	16	1
Read		1...1	01	10	00001	RRRRR	Z0	DDDDDDDDDDDDDDDD	Z
Write		1...1	01	01	00001	RRRRR	10	DDDDDDDDDDDDDDDD	Z

Note: - PRE (preamble): Send 32 consecutive 1s.; - ST (start of frame): Send 01b.; - OP (operation code): Send 10b for read or 01b for write.; - PHYAD (PHY address): Up to 32 PHY-LSIs can be connected to one MAC. PHY-LSIs are selected with these 5 bits. When the PHY-LSI address is 1, send 00001b.; - REGAD (register address): One register is selected from up to 32 registers in the PHY-LSI. When the register address is 1, send 00001b.; - TA (turnaround): Use 2-bit turnaround time to avoid contention between the register address and data during a read operation.; Send 10b during a write operation. Release the bus for 1 bit during a read operation (Z is output).; (This is indicated as Z0 because 0 is output from the PHY-LSI on the next clock cycle.); - DATA (data): 16-bit data. Sequentially send or receive starting from the MSB.; - IDLE (IDLE condition): Wait time before inputting the next MII or RMII management format. Release the bus during a write; operation (Z is output). No control is required, because a bus was already released during a read operation.

Limitations

The r_ether_phy module may need to be customized for PHY devices other than the ones currently supported (VSC8541, KSZ9131, KSZ9031, KSZ8081 and KSZ8041). Use the existing code as a starting point for creating a custom implementation.

Data Structures
struct	ether_phy_instance_ctrl_t

struct	ether_phy_extend_cfg_t

Enumerations
enum	ether_phy_port_type_t

enum	ether_phy_mdio_t

enum	ether_phy_speed_t

enum	ether_phy_duplex_t

enum	ether_phy_auto_negotiation_t

Data Structure Documentation

◆ ether_phy_instance_ctrl_t

struct ether_phy_instance_ctrl_t

ETHER PHY control block. DO NOT INITIALIZE. Initialization occurs when ether_phy_api_t::open is called.

Data Fields
uint32_t	open	Used to determine if the channel is configured.
ether_phy_cfg_t const *	p_ether_phy_cfg	Pointer to initial configurations.
volatile uint32_t *	p_reg_etherc	Pointer to ETHERC peripheral registers.
uint32_t	local_advertise	Capabilities bitmap for local advertising.

◆ ether_phy_extend_cfg_t

struct ether_phy_extend_cfg_t

Extended configuration

Data Fields
ether_phy_port_type_t	port_type
	Port type.

ether_phy_mdio_t	mdio_type
	MDIO type.

ether_phy_speed_t	bps
	PHY Speed.

ether_phy_duplex_t	duplex
	PHY Duplex.

ether_phy_auto_negotiation_t	auto_negotiation
	Auto Negotiation ON/OFF.

bsp_io_port_pin_t	phy_reset_pin
	PHY reset pin.

uint32_t	phy_reset_time
	PHY reset assert time in millsecond.

ether_selector_instance_t *	p_selector_instance
	Instance of selector driver.

void(*	p_target_init )(ether_phy_instance_ctrl_t *p_instance_ctrl)
	Pointer to callback that is called to initialize the target.

Enumeration Type Documentation

◆ ether_phy_port_type_t

enum ether_phy_port_type_t

Identify Ethernet and EtherCAT

Enumerator
ETHER_PHY_PORT_TYPE_ETHERNET	Ethernet.
ETHER_PHY_PORT_TYPE_ETHER_CAT	EtherCAT.

◆ ether_phy_mdio_t

enum ether_phy_mdio_t

Identify the access interface of the PHY register

Enumerator
ETHER_PHY_MDIO_GMAC	GMAC.
ETHER_PHY_MDIO_ETHSW	Ether switch.
ETHER_PHY_MDIO_ESC	EtherCAT.

◆ ether_phy_speed_t

enum ether_phy_speed_t

PHY Speed for setting

Enumerator
ETHER_PHY_SPEED_10_100	100/10Mbps (Note:Can be specified when auto-negotiation is ON)
ETHER_PHY_SPEED_10_1000	1000/100/10Mbps (Note:Can be specified when auto-negotiation is ON)
ETHER_PHY_SPEED_10	10Mbps
ETHER_PHY_SPEED_100	100Mbps
ETHER_PHY_SPEED_1000	1000Mbps

◆ ether_phy_duplex_t

enum ether_phy_duplex_t

PHY Duplex for setting

Enumerator
ETHER_PHY_DUPLEX_HALF	Half duplex.
ETHER_PHY_DUPLEX_FULL	Full duplex.

◆ ether_phy_auto_negotiation_t

enum ether_phy_auto_negotiation_t

PHY Auto Negotiation for setting

Enumerator
ETHER_PHY_AUTO_NEGOTIATION_OFF	Auto Negotiation is ON.
ETHER_PHY_AUTO_NEGOTIATION_ON	Auto Negotiation is OFF.

Function Documentation

◆ R_ETHER_PHY_Open()

fsp_err_t R_ETHER_PHY_Open	(	ether_phy_ctrl_t *const	p_ctrl,
		ether_phy_cfg_t const *const	p_cfg
	)

Resets Ethernet PHY device. Implements ether_phy_api_t::open.

Return values

FSP_SUCCESS	Channel opened successfully.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block or configuration structure is NULL.
FSP_ERR_ALREADY_OPEN	Control block has already been opened or channel is being used by another instance. Call close() then open() to reconfigure.
FSP_ERR_INVALID_CHANNEL	Invalid channel number is given.
FSP_ERR_INVALID_ARGUMENT	Invalid arguments.
FSP_ERR_TIMEOUT	PHY-LSI Reset wait timeout.
FSP_ERR_INVALID_POINTER	Pointer to p_cfg is NULL.

◆ R_ETHER_PHY_Close()

fsp_err_t R_ETHER_PHY_Close ( ether_phy_ctrl_t *const p_ctrl )

Close Ethernet PHY device. Implements ether_phy_api_t::close.

Return values

FSP_SUCCESS	Channel successfully closed.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened

◆ R_ETHER_PHY_ChipInit()

fsp_err_t R_ETHER_PHY_ChipInit	(	ether_phy_ctrl_t *const	p_ctrl,
		ether_phy_cfg_t const *const	p_cfg
	)

Initialize Ethernet PHY device. Implements ether_phy_api_t::chipInit.

Return values

FSP_ERR_UNSUPPORTED Initialize Ethernet PHY device is not supported.

◆ R_ETHER_PHY_Read()

fsp_err_t R_ETHER_PHY_Read	(	ether_phy_ctrl_t *const	p_ctrl,
		uint32_t	reg_addr,
		uint32_t *const	p_data
	)

Read data from register of PHY-LSI . Implements ether_phy_api_t::read.

Return values

FSP_SUCCESS	ETHER_PHY successfully read data.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block is NULL.
FSP_ERR_INVALID_POINTER	Pointer to read buffer is NULL.
FSP_ERR_INVALID_ARGUMENT	Address is not a valid size

◆ R_ETHER_PHY_Write()

fsp_err_t R_ETHER_PHY_Write	(	ether_phy_ctrl_t *const	p_ctrl,
		uint32_t	reg_addr,
		uint32_t	data
	)

Write data to register of PHY-LSI . Implements ether_phy_api_t::write.

Return values

FSP_SUCCESS	ETHER_PHY successfully write data.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block is NULL.
FSP_ERR_INVALID_ARGUMENT	Address or data is not a valid size

◆ R_ETHER_PHY_StartAutoNegotiate()

fsp_err_t R_ETHER_PHY_StartAutoNegotiate ( ether_phy_ctrl_t *const p_ctrl )

Starts auto-negotiate. Implements ether_phy_api_t::startAutoNegotiate.

Return values

FSP_SUCCESS	ETHER_PHY successfully starts auto-negotiate.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened.
FSP_ERR_INVALID_MODE	It was aborted the process because it is not auto-negotiation mode.
FSP_ERR_INVALID_ARGUMENT	Register address is incorrect
FSP_ERR_INVALID_POINTER	Pointer to read buffer is NULL.

◆ R_ETHER_PHY_LinkPartnerAbilityGet()

fsp_err_t R_ETHER_PHY_LinkPartnerAbilityGet	(	ether_phy_ctrl_t *const	p_ctrl,
		uint32_t *const	p_line_speed_duplex,
		uint32_t *const	p_local_pause,
		uint32_t *const	p_partner_pause
	)

Reports the other side's physical capability. Implements ether_phy_api_t::linkPartnerAbilityGet.

Return values

FSP_SUCCESS	ETHER_PHY successfully get link partner ability.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block is NULL.
FSP_ERR_INVALID_POINTER	Pointer to arguments are NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened
FSP_ERR_ETHER_PHY_ERROR_LINK	PHY-LSI is not link up.
FSP_ERR_ETHER_PHY_NOT_READY	The auto-negotiation isn't completed
FSP_ERR_INVALID_ARGUMENT	Status register address is incorrect

◆ R_ETHER_PHY_LinkStatusGet()

fsp_err_t R_ETHER_PHY_LinkStatusGet ( ether_phy_ctrl_t *const p_ctrl )

Returns the status of the physical link. Implements ether_phy_api_t::linkStatusGet.

Return values

FSP_SUCCESS	ETHER_PHY successfully get link partner ability.
FSP_ERR_ASSERTION	Pointer to ETHER_PHY control block is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened
FSP_ERR_ETHER_PHY_ERROR_LINK	PHY-LSI is not link up.
FSP_ERR_INVALID_ARGUMENT	Status register address is incorrect
FSP_ERR_INVALID_POINTER	Pointer to read buffer is NULL.

Functions

Detailed Description

Overview

Features

Configuration

Build Time Configurations for r_ether_phy

Configurations for Networking > Ethernet (r_ether_phy)

Accessing the MII and RMII Registers

MII and RMII management frame format

Limitations

Data Structures

Enumerations

Data Structure Documentation

◆ ether_phy_instance_ctrl_t

◆ ether_phy_extend_cfg_t

Data Fields

Enumeration Type Documentation

◆ ether_phy_port_type_t

◆ ether_phy_mdio_t

◆ ether_phy_speed_t

◆ ether_phy_duplex_t

◆ ether_phy_auto_negotiation_t

Function Documentation

◆ R_ETHER_PHY_Open()

◆ R_ETHER_PHY_Close()

◆ R_ETHER_PHY_ChipInit()

◆ R_ETHER_PHY_Read()

◆ R_ETHER_PHY_Write()

◆ R_ETHER_PHY_StartAutoNegotiate()

◆ R_ETHER_PHY_LinkPartnerAbilityGet()

◆ R_ETHER_PHY_LinkStatusGet()