Functions
fsp_err_t	R_LCDC_Open (display_ctrl_t const p_api_ctrl, display_cfg_t const const p_cfg)

fsp_err_t	R_LCDC_Close (display_ctrl_t *const p_api_ctrl)

fsp_err_t	R_LCDC_Start (display_ctrl_t *const p_api_ctrl)

fsp_err_t	R_LCDC_Stop (display_ctrl_t *const p_api_ctrl)

fsp_err_t	R_LCDC_LayerChange (display_ctrl_t const const p_api_ctrl, display_runtime_cfg_t const const p_cfg, display_frame_layer_t layer)

fsp_err_t	R_LCDC_BufferChange (display_ctrl_t const const p_api_ctrl, uint8_t const framebuffer, display_frame_layer_t layer)

fsp_err_t	R_LCDC_ColorCorrection (display_ctrl_t const const p_api_ctrl, display_correction_t const const p_correction)

fsp_err_t	R_LCDC_ClutUpdate (display_ctrl_t const const p_api_ctrl, display_clut_cfg_t const const p_clut_cfg, display_frame_layer_t layer)

fsp_err_t	R_LCDC_ClutEdit (display_ctrl_t const *const p_api_ctrl, display_frame_layer_t layer, uint8_t index, uint32_t color)

fsp_err_t	R_LCDC_ColorKeySet (display_ctrl_t const *const p_api_ctrl, display_colorkeying_layer_t ck_cfg, display_frame_layer_t layer)

fsp_err_t	R_LCDC_StatusGet (display_ctrl_t const const p_api_ctrl, display_status_t const p_status)

Detailed Description

Driver for the LCDC peripheral on RZ microprocessor. This module implements the Display Interface.

Overview

The LCDC is a graphic output peripheral designed to automatically generate timing and data signals for LCD panels. As part of its internal pipeline the two internal graphics layers can be repositioned, alpha blended, and converted to from a wide variety of pixel formats.

Features

The following features are available:

Feature	Options
Input color formats	RGB565, RGB888, BGR888, ARGB8888, RGBA8888, ABGR8888, YCbCr444(interleaved), YCbCr422(interleaved)-UYVY, YCbCr422(interleaved)-YUYV, YCbCr422(interleaved)-YVYU, YCbCr422(interleaved)-YYUV, YCbCr420(interleaved), YUV420(Planar)
Correction processes	Alpha blending, positioning
Timing signals	Vsync, Hsync, Vertical and horizontal data enable (DE)
Maximum resolution	Up to 1920 x 1080 pixels (dependent on sync signal width)
Interrupts	Frame End, Underrun
Other functions	Byte Swap configuration, Background color setting, color space conversion

Configuration

Build Time Configurations for r_lcdc

The following build time configurations are defined in fsp_cfg/r_lcdc_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected, code for parameter checking is included in the build.
Multiplex Interrupt	Enabled Disabled	Disabled	Enable multiplex interrupt for a single driver.

Configurations for Graphics > Display (r_lcdc)

This module can be added to the Stacks tab via New Stack > Graphics > Display (r_lcdc).

Configuration	Options	Default	Description
General > Name	Name must be a valid C symbol	g_display0	Module name.
Interrupts > Callback Function	Name must be a valid C symbol	NULL	A user callback function can be defined here.
Interrupts > Frame End Interrupt Priority	MCU Specific Options		Input the frame end interrupt priority.
Input > Graphics Layer 1 > General > Enabled	Yes No	Yes	Specify Used if the graphics layer 1 is used. If so a framebuffer will be automatically generated based on the specified height and horizontal stride.
Input > Graphics Layer 1 > General > Horizontal size	Value must be an integer from 1 to 1920	1280	Specify the number of horizontal pixels.
Input > Graphics Layer 1 > General > Vertical size	Value must be an integer from 1 to 1080	720	Specify the number of vertical pixels.
Input > Graphics Layer 1 > General > Horizontal position	Value must be an integer from -1919 to 1919	0	Specify the horizontal offset in pixels of the graphics layer from the background layer.
Input > Graphics Layer 1 > General > Vertical position	Value must be an integer from -1079 to 1079	0	Specify the vertical offset in pixels of the graphics layer from the background layer.
Input > Graphics Layer 1 > General > Color format	Refer to the RZT Configuration tool for available options.	YCbCr422 interleaved YUYV (16-bit)	Specify the graphics layer Input format.
Input > Graphics Layer 1 > General > 64bit swap	Enabled Disabled	Disabled	Select Used if enable 64bits swap input data.
Input > Graphics Layer 1 > General > 32bit swap	Enabled Disabled	Disabled	Select Used if enable 32bits swap input data.
Input > Graphics Layer 1 > General > 16bit swap	Enabled Disabled	Disabled	Select Used if enable 16bits swap input data.
Input > Graphics Layer 1 > General > 8bit swap	Enabled Disabled	Disabled	Select Used if enable 8bits swap input data.
Input > Graphics Layer 1 > Framebuffer > Framebuffer name	This property must be a valid C symbol	fb_background	Specify the name for the framebuffer for Layer 1.
Input > Graphics Layer 1 > Framebuffer > Number of buffers	Value must be an integer from 0 to 8	1	Specify the number of buffers to create.When user select 0,the buffer set in user application can be used.
Input > Graphics Layer 1 > Framebuffer > Section for framebuffer allocation	Manual Entry	.lcdc_frame_buffer	The LCDC module uses non-cached data located in the DDR mirror region. Do not change the following FSP Configurator settings: # The cache settings for the MPU (CR52) or MMU (CA55) in the DDR mirror region. Change the following FSP Configurator settings: # Region enable settings of DDR mirror 1 in CPU MPU must be set to Enable.
Input > Graphics Layer 2 > General > Enabled	Yes No	Yes	Specify Used if the graphics layer 2 is used. If so a framebuffer will be automatically generated based on the specified height and horizontal stride.
Input > Graphics Layer 2 > General > Horizontal size	Value must be an integer from 1 to 1920	1280	Specify the number of horizontal pixels.
Input > Graphics Layer 2 > General > Vertical size	Value must be an integer from 1 to 1080	800	Specify the number of vertical pixels.
Input > Graphics Layer 2 > General > Horizontal position	Value must be an integer from -1919 to 1919	0	Specify the horizontal offset in pixels of the graphics layer from the background layer.
Input > Graphics Layer 2 > General > Vertical position	Value must be an integer from -1079 to 1079	0	Specify the vertical offset in pixels of the graphics layer from the background layer.
Input > Graphics Layer 2 > General > Color format	Refer to the RZT Configuration tool for available options.	YCbCr422 interleaved YUYV (16-bit)	Specify the graphics layer Input format.
Input > Graphics Layer 2 > General > 64bit swap	Enabled Disabled	Disabled	Select Used if enable 64bits swap input data.
Input > Graphics Layer 2 > General > 32bit swap	Enabled Disabled	Disabled	Select Used if enable 32bits swap input data.
Input > Graphics Layer 2 > General > 16bit swap	Enabled Disabled	Disabled	Select Used if enable 16bits swap input data.
Input > Graphics Layer 2 > General > 8bit swap	Enabled Disabled	Disabled	Select Used if enable 8bits swap input data.
Input > Graphics Layer 2 > Framebuffer > Framebuffer name	This property must be a valid C symbol	fb_foreground	Specify the name for the framebuffer for Layer 2.
Input > Graphics Layer 2 > Framebuffer > Number of buffers	Value must be an integer from 0 to 8	1	Specify the number of buffers to create.When user select 0,the buffer set in user application can be used.
Input > Graphics Layer 2 > Framebuffer > Section for framebuffer allocation	Manual Entry	.lcdc_frame_buffer	The LCDC module uses non-cached data located in the DDR mirror region. Do not change the following FSP Configurator settings: # The cache settings for the MPU (CR52) or MMU (CA55) in the DDR mirror region. Change the following FSP Configurator settings: # Region enable settings of DDR mirror 1 in CPU MPU must be set to Enable.
Output > Timing > Horizontal total cycles	Value must be an integer from 3 to 28668	1650	Specify the total cycles in a horizontal line. Set to the number of cycles defined in the data sheet of LCD panel sheet in your system
Output > Timing > Horizontal active video cycles	Value must be an integer from 1 to 8190	1280	Specify the number of active video cycles in a horizontal line (including front and back porch). Set to the number of cycles defined in the data sheet of LCD panel sheet in your system.
Output > Timing > Horizontal back porch cycles	Value must be an integer from 0 to 12286	260	Specify the number of back porch cycles in a horizontal line. Back porch starts from the beginning of Hsync cycles, which means back porch cycles contain Hsync cycles. Set to the number of cycles defined in the data sheet of LCD panel sheet in your system.
Output > Timing > Horizontal sync signal cycles	Value must be an integer from 0 to 4095	40	Specify the number of Hsync signal assertion cycles. Set to the number of cycles defined in the data sheet of LCD panel sheet in your system.
Output > Timing > Horizontal sync signal polarity	Low active High active	High active	Select the polarity of Hsync signal to match your system.
Output > Timing > Vertical total lines	Value must be an integer from 0 to 28668	750	Specify number of total lines in a frame (including front and back porch).
Output > Timing > Vertical active video lines	Value must be an integer from 1 to 8190	720	Specify the number of active video lines in a frame.
Output > Timing > Vertical back porch lines	Value must be an integer from 0 to 12286	25	Specify the number of back porch lines in a frame. Back porch starts from the beginning of Vsync lines, which means back porch lines contain Vsync lines.
Output > Timing > Vertical sync signal lines	Value must be an integer from 0 to 4095	5	Specify the Vsync signal assertion lines in a frame.
Output > Timing > Vertical sync signal polarity	Low active High active	High active	Select the polarity of Vsync signal to match to your system.
Output > Timing > Data Enable Signal Polarity	Low active High active	High active	Select the polarity of Data Enable signal to match to your system.
Output > Timing > Sync edge	Rising edge Falling edge	Falling edge	Select the polarity of Sync signals to match to your system.
Output > Background > Red	Value must be an integer from 0 to 255	0	Red component of the background color.
Output > Background > Green	Value must be an integer from 0 to 255	0	Green component of the background color.
Output > Background > Blue	Value must be an integer from 0 to 255	0	Blue component of the background color.
Color Keying > Graphics Layer 1 > Source Color > Red	Value must be an integer from 0 to 255	0	Red component of the soucre color for color keying.
Color Keying > Graphics Layer 1 > Source Color > Green	Value must be an integer from 0 to 255	0	Green component of the soucre color for color keying.
Color Keying > Graphics Layer 1 > Source Color > Blue	Value must be an integer from 0 to 255	0	Blue component of the soucre color for color keying.
Color Keying > Graphics Layer 1 > Destination Color > Alpha	Value must be an integer from 0 to 255	0	Alpha component of the destination color for color keying.
Color Keying > Graphics Layer 1 > Destination Color > Red	Value must be an integer from 0 to 255	0	Red component of the soucre color for color keying.
Color Keying > Graphics Layer 1 > Destination Color > Green	Value must be an integer from 0 to 255	0	Green component of the soucre color for color keying.
Color Keying > Graphics Layer 1 > Destination Color > Blue	Value must be an integer from 0 to 255	0	Blue component of the soucre color for color keying.
Color Keying > Graphics Layer 1 > Enable	Enabled Disabled	Disabled	Enable Color Keying.
Color Keying > Graphics Layer 2 > Source Color > Red	Value must be an integer from 0 to 255	0	Red component of the soucre color for color keying.
Color Keying > Graphics Layer 2 > Source Color > Green	Value must be an integer from 0 to 255	0	Green component of the soucre color for color keying.
Color Keying > Graphics Layer 2 > Source Color > Blue	Value must be an integer from 0 to 255	0	Blue component of the soucre color for color keying.
Color Keying > Graphics Layer 2 > Destination Color > Alpha	Value must be an integer from 0 to 255	0	Alpha component of the destination color for color keying.
Color Keying > Graphics Layer 2 > Destination Color > Red	Value must be an integer from 0 to 255	0	Red component of the soucre color for color keying.
Color Keying > Graphics Layer 2 > Destination Color > Green	Value must be an integer from 0 to 255	0	Green component of the soucre color for color keying.
Color Keying > Graphics Layer 2 > Destination Color > Blue	Value must be an integer from 0 to 255	0	Blue component of the soucre color for color keying.
Color Keying > Graphics Layer 2 > Enable	Enabled Disabled	Disabled	Enable Color Keying.

Note

The LCDC outputs images in buffers on external DDR memory to LCD panels. Therefore, the initial configuration of external DDR memory must be completed before using the LCDC.
LCDC accesses external DDR memory via DDR mirror region. To access DDR mirror region from the CPU for image processing, the Address Expander must be configured properly.
The memory space to place the images shall be mapped to the Non-Cache region. Therefore, the MPU and MMU must be configured properly.

Clock Configuration

The pixel clock is typically a divided clock generated from PLL3 (maximum output frequency of 430 MHz). The M-, P-, S-Divider and Delta-Sigma Modulator value need to be set for divided clock setting. These settings are configurable in the Clocks tab. Consult Section "PLL Circuit" in the RZ microprocessor Manual for PLL3 output frequency details.

Pin Configuration

This module controls a variety of pins necessary for LCD data and timing signal output:

Pin Name	Function	Notes
DISP_CLK	Display Parallel Interface pixel clock	Supports up to 100 MHz of the pixel clock frequency.
DISP_HSYNC	Display Parallel Interface Horizontal sync pulse
DISP_VSYNC	Display Parallel Interface Vertical sync pulse
DISP_DE	Display Parallel Interface data enable
DISP_DATARn (n = 0 to 7)	Display Parallel Interface pixel data output (R)
DISP_DATAGn (n = 0 to 7)	Display Parallel Interface pixel data output (G)
DISP_DATABn (n = 0 to 7)	Display Parallel Interface pixel data output (B)

Runtime Configuration Options

Note: All runtime configurations detailed below are also automatically configured during R_LCDC_Open based on the options selected in the FSP Configuration editor.

Blend processing

Control of layer positioning and alpha blending is possible at runtime via R_LCDC_LayerChange. This function takes a display_runtime_cfg_t parameter which contains the same input and layer elements as the display_cfg_t control block.

Examples

Basic Example

This is a basic example showing the minimum code required to initialize and start the LCDC module. If the entire display can be drawn within the vertical blanking period no further code may be necessary.

void basic_example (void)
{
    fsp_err_t err;
    // Open the LCDC driver
    err = g_display_on_lcdc.open(&g_display_ctrl, &g_display_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    // Start display output
    err = R_LCDC_Start(&g_display_ctrl);
    assert(FSP_SUCCESS == err);
}

Example for YUV420 Planar

This is a example using the YUV420 Planar format. If you use this format, you should set 0 into Number of buffers and configure the base address for Y, Cr and Cr Plane.

void planar_example (void)
{
    fsp_err_t err;
    g_display_runtime_cfg_bg.input.p_base       = (uint32_t *) &plane_y;
    g_display_runtime_cfg_bg.input.p_base_cb    = (uint32_t *) &plane_cb;
    g_display_runtime_cfg_bg.input.p_base_cr    = (uint32_t *) &plane_cr;
    g_display_runtime_cfg_bg.input.hstride      = DISPLAY_BUFFER_STRIDE_BYTES_INPUT0;
    g_display_runtime_cfg_bg.input.hstride_cbcr = DISPLAY_BUFFER_STRIDE_UV_BYTES_INPUT0;
    // Open the LCDC driver
    err = g_display_on_lcdc.open(&g_display_ctrl, &g_display_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    // Start display output
    err = g_display_on_lcdc.start(&g_display_ctrl);
    assert(FSP_SUCCESS == err);
    // Change configuration for layer1 to display YUV420 Planar format
    err = g_display_on_lcdc.layerChange(&g_display_ctrl, &g_display_runtime_cfg_bg, DISPLAY_FRAME_LAYER_1);
    assert(FSP_SUCCESS == err);
}

Data Structures
struct	lcdc_extended_cfg_t

struct	lcdc_instance_ctrl_t

Data Structure Documentation

◆ lcdc_extended_cfg_t

struct lcdc_extended_cfg_t

LCDC hardware specific configuration

Data Fields
uint8_t	frame_end_ipl	Frame end interrupt priority.
IRQn_Type	frame_end_irq	Frame end interrupt vector.
display_colorkeying_layer_t *	p_ckey_cfg	Color keying configuration.

◆ lcdc_instance_ctrl_t

struct lcdc_instance_ctrl_t

Display control block. DO NOT INITIALIZE.

Function Documentation

◆ R_LCDC_Open()

fsp_err_t R_LCDC_Open	(	display_ctrl_t *const	p_api_ctrl,
		display_cfg_t const *const	p_cfg
	)

　Initializes the LCDC modules and enables interrupts

Return values

FSP_SUCCESS	Initializes the LCDC modules.
FSP_ERR_ALREADY_OPEN	LCDC module is open already.
FSP_ERR_ASSERTION	Pointer to the control block is NULL.
FSP_ERR_INVALID_TIMING_SETTING	Invalid timing parameter.
FSP_ERR_INVALID_LAYER_SETTING	Invalid layer parameter.

◆ R_LCDC_Close()

fsp_err_t R_LCDC_Close ( display_ctrl_t *const p_api_ctrl )

Close the display while the LCDC module is operating

Return values

FSP_SUCCESS	Close the LCDC module
FSP_ERR_ASSERTION	Pointer to the control block is NULL.
FSP_ERR_NOT_OPEN	LCDC module is not open

◆ R_LCDC_Start()

fsp_err_t R_LCDC_Start ( display_ctrl_t *const p_api_ctrl )

Start displaying a layer image. It is possible when LCDC state is open

Return values

FSP_SUCCESS	Start display Normally
FSP_ERR_ASSERTION	Pointer to the control block is NULL.
FSP_ERR_NOT_OPEN	LCDC module is not open

◆ R_LCDC_Stop()

fsp_err_t R_LCDC_Stop ( display_ctrl_t *const p_api_ctrl )

Start displaying a layer image. It is possible when LCDC state is displaying

Return values

FSP_SUCCESS	Stop the LCDC module
FSP_ERR_ASSERTION	Pointer to the control block is NULL.
FSP_ERR_INVALID_MODE	LCDC module status is invalid for R_LCDC_Stop API

◆ R_LCDC_LayerChange()

fsp_err_t R_LCDC_LayerChange	(	display_ctrl_t const *const	p_api_ctrl,
		display_runtime_cfg_t const *const	p_cfg,
		display_frame_layer_t	layer
	)

Change layer configurations. It is possible when LCDC state is displaying

Return values

FSP_SUCCESS	The LCDC layer is changed
FSP_ERR_INVALID_LAYER_SETTING	Invalid layer parameter
FSP_ERR_ASSERTION	Pointer to the control block and configuration structure is NULL.
FSP_ERR_INVALID_MODE	LCDC module status is invalid for R_LCDC_LayerChange API

◆ R_LCDC_BufferChange()

fsp_err_t R_LCDC_BufferChange	(	display_ctrl_t const *const	p_api_ctrl,
		uint8_t *const	framebuffer,
		display_frame_layer_t	layer
	)

Change Buffer configuration. It is possible when LCDC state is displaying

Return values

FSP_SUCCESS	The Buffer read by LCDC is changed
FSP_ERR_INVALID_LAYER_SETTING	Invalid layer parameter
FSP_ERR_ASSERTION	Pointer to the control block is NULL.
FSP_ERR_INVALID_MODE	LCDC module status is invalid for R_LCDC_BufferChange API

◆ R_LCDC_ColorCorrection()

fsp_err_t R_LCDC_ColorCorrection	(	display_ctrl_t const *const	p_api_ctrl,
		display_correction_t const *const	p_correction
	)

Placeholder for unsupported color correction function. Implements display_api_t::correction.

Return values

FSP_ERR_UNSUPPORTED Color correction is not supported.

◆ R_LCDC_ClutUpdate()

fsp_err_t R_LCDC_ClutUpdate	(	display_ctrl_t const *const	p_api_ctrl,
		display_clut_cfg_t const *const	p_clut_cfg,
		display_frame_layer_t	layer
	)

Placeholder for unsupported CLUT update function. Implements display_api_t::clut.

Return values

FSP_ERR_UNSUPPORTED CLUT update is not supported.

◆ R_LCDC_ClutEdit()

fsp_err_t R_LCDC_ClutEdit	(	display_ctrl_t const *const	p_api_ctrl,
		display_frame_layer_t	layer,
		uint8_t	index,
		uint32_t	color
	)

Placeholder for unsupported CLUT edit function. Implements display_api_t::clutEdit.

Return values

FSP_ERR_UNSUPPORTED CLUT edit is not supported.

◆ R_LCDC_ColorKeySet()

fsp_err_t R_LCDC_ColorKeySet	(	display_ctrl_t const *const	p_api_ctrl,
		display_colorkeying_layer_t	ck_cfg,
		display_frame_layer_t	layer
	)

Set the Color Keying Configuration. It is possible when LCDC state is displaying.

Return values

FSP_SUCCESS	The source color is changed to destination color
FSP_ERR_INVALID_LAYER_SETTING	Invalid layer parameter
FSP_ERR_ASSERTION	Pointer to the control block is NULL.
FSP_ERR_INVALID_MODE	LCDC module status is invalid for R_LCDC_ColorKeying API

◆ R_LCDC_StatusGet()

fsp_err_t R_LCDC_StatusGet	(	display_ctrl_t const *const	p_api_ctrl,
		display_status_t *const	p_status
	)

Get the current status of LCDC module. (close or open or displaying)

Return values

FSP_SUCCESS	Get status of LCDC module
FSP_ERR_ASSERTION	Pointer to the control block and status structure is NULL.

Functions

Detailed Description

Overview

Features

Configuration

Build Time Configurations for r_lcdc

Configurations for Graphics > Display (r_lcdc)

Clock Configuration

Pin Configuration

Runtime Configuration Options

Blend processing

Examples

Basic Example

Example for YUV420 Planar

Data Structures

Data Structure Documentation

◆ lcdc_extended_cfg_t

◆ lcdc_instance_ctrl_t

Function Documentation

◆ R_LCDC_Open()

◆ R_LCDC_Close()

◆ R_LCDC_Start()

◆ R_LCDC_Stop()

◆ R_LCDC_LayerChange()

◆ R_LCDC_BufferChange()

◆ R_LCDC_ColorCorrection()

◆ R_LCDC_ClutUpdate()

◆ R_LCDC_ClutEdit()

◆ R_LCDC_ColorKeySet()

◆ R_LCDC_StatusGet()