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RZT Flexible Software Package Documentation
Release v3.0.0
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Functions | |
fsp_err_t | R_XSPI_HYPER_Open (hyperbus_ctrl_t *p_ctrl, hyperbus_cfg_t const *const p_cfg) |
fsp_err_t | R_XSPI_HYPER_Close (hyperbus_ctrl_t *p_ctrl) |
fsp_err_t | R_XSPI_HYPER_BurstTypeSet (hyperbus_ctrl_t *p_ctrl, hyperbus_burst_type_t burst_type) |
fsp_err_t | R_XSPI_HYPER_AccessSpaceSet (hyperbus_ctrl_t *p_ctrl, hyperbus_space_select_t access_space) |
fsp_err_t | R_XSPI_HYPER_DirectTransfer (hyperbus_ctrl_t *const p_ctrl, hyperbus_direct_transfer_t *const p_transfer) |
fsp_err_t | R_XSPI_HYPER_Write (hyperbus_ctrl_t *p_ctrl, uint8_t const *const p_src, uint8_t *const p_dest, uint32_t byte_count) |
fsp_err_t | R_XSPI_HYPER_Erase (hyperbus_ctrl_t *p_ctrl, uint8_t *const p_device_address, uint32_t byte_count) |
fsp_err_t | R_XSPI_HYPER_StatusGet (hyperbus_ctrl_t *p_ctrl, hyperbus_status_t *const p_status) |
fsp_err_t | R_XSPI_HYPER_AutoCalibrate (hyperbus_ctrl_t *p_ctrl) |
Driver for the xSPI peripheral on RZ microprocessor. This module implements the HyperBus Interface.
The HyperBus peripheral interfaces with an external HyperRAM device to perform data I/O Operations.
The xSPI Hyper driver has the following key features to support the HyperRAM device:
Configuration | Options | Default | Description |
---|---|---|---|
Memory Mapping Address Space > Unit 0 > Chip Select 0 > Start Address | Address should be the start address of xspi unit 0 external address space | 0x60000000 | Start address of xSPI Unit 0 Chip Select 0 in memory mapping mode. |
Memory Mapping Address Space > Unit 0 > Chip Select 0 > End Address | Address should be within xspi unit 0 external address space | 0x600FFFFF | End address of xSPI Unit 0 Chip Select 1 in memory mapping mode. |
Memory Mapping Address Space > Unit 0 > Chip Select 1 > Start Address | Address should be within xspi unit 0 external address space | 0x64000000 | Start address of xSPI Unit 0 Chip Select 1 in memory mapping mode. |
Memory Mapping Address Space > Unit 0 > Chip Select 1 > End Address | Address should be within xspi unit 0 external address space | 0x640FFFFF | End address of xSPI Unit 0 Chip Select 1 in memory mapping mode. |
Memory Mapping Address Space > Unit 1 > Chip Select 0 > Start Address | Address should be the start address of xspi unit 1 external address space | 0x68000000 | Start address of xSPI Unit 1 Chip Select 0 in memory mapping mode. |
Memory Mapping Address Space > Unit 1 > Chip Select 0 > End Address | Address should be within xspi unit 1 external address space | 0x680FFFFF | End address of xSPI Unit 1 Chip Select 0 in memory mapping mode. |
Memory Mapping Address Space > Unit 1 > Chip Select 1 > Start Address | Address should be within xspi unit 1 external address space | 0x6C000000 | Start address of xSPI Unit 1 Chip Select 1 in memory mapping mode. |
Memory Mapping Address Space > Unit 1 > Chip Select 1 > End Address | Address should be within xspi unit 1 external address space | 0x6C0FFFFF | End address of xSPI Unit 1 Chip Select 1 in memory mapping mode. |
Memory Mapping Address Space > Memory Mapping Address Space Configuration Support | MCU Specific Options | Support status of Memory Mapping Address Space setting on this MCU. If Not supported, the address space set in Memory Mapping Address Space is invalid. | |
Parameter Checking |
| Default (BSP) | If selected code for parameter checking is included in the build. |
Unit 0 Prefetch Function |
| Disable | Enable prefetch function on memory-mapped reads of xSPI Unit 0. |
Unit 1 Prefetch Function |
| Disable | Enable prefetch function on memory-mapped reads of xSPI Unit 1. |
Unit 0 IO voltage | MCU Specific Options | Voltage setting of xSPI Unit 0. | |
Unit 1 IO voltage | MCU Specific Options | Voltage setting of xSPI Unit 1. |
Configuration | Options | Default | Description |
---|---|---|---|
General > Name | Name must be a valid C symbol | g_hyperbus0 | Module name. |
General > Unit | Unit should be 0 or 1 | 1 | Specify the XSPI unit number. |
General > Chip Select |
| Chip Select 0 | Specify the HyperBus chip select line to use. |
General > RAM Size | MCU Specific Options | Specify the HyperRAM size. | |
General > Initial latency (Read) | Refer to the RZT Configuration tool for available options. | 6 CYCLES | Specify the read latency cycle |
General > Initial latency (Memory Write) | Refer to the RZT Configuration tool for available options. | 6 CYCLES | Specify the write latency cycle in memory write |
General > Initial latency (Register Write) | Refer to the RZT Configuration tool for available options. | 0 CYCLE (No Latency) | Specify the write latency cycle in register write |
HyperBus Transaction Characteristics > Initial Burst Type | Linear burst (Burst type = 1) | Linear burst (Burst type = 1) | Set burst type when driver starts. |
HyperBus Transaction Characteristics > Initial Access Space |
| Memory Space (AS = 0) | Set the Hyper device access address when starting the driver. |
Auto Calibration > Data latching delay | Must be a valid non-negative integer | 0x08 | Set this to 0 to enable auto-calibration. 0x08 is the default value |
Auto Calibration > Auto-Calibration Address | Must be a valid non-negative integer | 0x00 | Set the address of the read/write destination to be performed for auto-calibration. |
Bus Timing > CS minimum idle term | Refer to the RZT Configuration tool for available options. | 7 CYCLES | Define the CS minimum idle term. |
Bus Timing > CS Asserting extension |
| No Extension | Define the CS asserting extension |
Bus Timing > CS Negating extension |
| No Extension | Define the CS negating extension |
The XSPI_CLKn frequencies can be set on the Clocks tab of FSP Configuration editor or by using the CGC Interface at run-time.
The following pins are available to connect to an external Hyper device:
After R_XSPI_HYPER_Open() completes successfully, the HYPER device contents are mapped to External Address Space xSPIn or their mirror spaces and can be read like on-chip memory. Please refer to xSPI "Overview" section in your device's manual on address map details.
In the configurator properties, 'Memory Mapping Address Space Configuration Support' is set to either 'Supported' or 'Not Supported' depending on your device. The method of memory mapped access address configuration depends on the value of 'Memory Mapping Address Space Configuration Support'.
If 'Memory Mapping Address Space Configuration Support' is 'Supported', 'Memory Mapping Address Space' should be set appropriately for your device. The table below shows an example of 'Memory Mapping Address Space' configurations when 64MB memory is used as a slave device in each Chip Select.
Properties | RZ/T2ME | RZ/T2H |
---|---|---|
Memory Mapping Address Space > Unit 0 > Chip Select 0 > Start Address | 0x60000000 (Fixed) | 0x40000000 (Fixed) |
Memory Mapping Address Space > Unit 0 > Chip Select 0 > End Address | 0x63FFFFFF | 0x43FFFFFF |
Memory Mapping Address Space > Unit 0 > Chip Select 1 > Start Address | 0x64000000 | 0x48000000 |
Memory Mapping Address Space > Unit 0 > Chip Select 1 > End Address | 0x67FFFFFF | 0x4BFFFFFF |
Memory Mapping Address Space > Unit 1 > Chip Select 0 > Start Address | 0x68000000 (Fixed) | 0x50000000 (Fixed) |
Memory Mapping Address Space > Unit 1 > Chip Select 0 > End Address | 0x6BFFFFFF | 0x53FFFFFF |
Memory Mapping Address Space > Unit 1 > Chip Select 1 > Start Address | 0x6C000000 | 0x58000000 |
Memory Mapping Address Space > Unit 1 > Chip Select 1 > End Address | 0x6FFFFFFF | 0x5BFFFFFF |
Memory Mapping Address Space > Memory Mapping Address Space Configuration Support | Supported | Supported |
The address space of each chip select set by the above configuration is as follows.
Address Space of Each Chip Select | RZ/T2ME | RZ/T2H |
---|---|---|
Unit 0 Chip Select 0 Start Address | 0x60000000 (Fixed) | 0x40000000 (Fixed) |
Unit 0 Chip Select 0 End Address | 0x63FFFFFF | 0x43FFFFFF |
Unit 0 Chip Select 1 Start Address | 0x64000000 | 0x48000000 |
Unit 0 Chip Select 1 End Address | 0x67FFFFFF | 0x4BFFFFFF |
Unit 1 Chip Select 0 Start Address | 0x68000000 (Fixed) | 0x50000000 (Fixed) |
Unit 1 Chip Select 0 End Address | 0x6BFFFFFF | 0x53FFFFFF |
Unit 1 Chip Select 1 Start Address | 0x6C000000 | 0x58000000 |
Unit 1 Chip Select 1 End Address | 0x6FFFFFFF | 0x5BFFFFFF |
If 'Memory Mapping Address Space Configuration Support' is 'Not Supported' for your device, 'Memory Mapping Address Space' configurations are invalid. In this case, the start address of each chip select is fixed by device, and only the size of the address space is configured in 'Memory Size' property. The table below shows an example of the address space configuration when 64MB memory is used as a slave device in Unit 0 Chip Select 0.
Properties | RZ/T2M | RZ/T2L |
---|---|---|
Memory Mapping Address Space > Memory Mapping Address Space Configuration Support | Not Supported | Not Supported |
General > Unit | 0 | 0 |
General > Chip Select | 0 | 0 |
General > Memory Size | 64MB | 64MB |
The address space of each chip select set by the above configuration is as follows.
Address Space of Each Chip Select | RZ/T2M | RZ/T2L |
---|---|---|
Unit 0 Chip Select 0 Start Address | 0x60000000 (Fixed) | 0x60000000 (Fixed) |
Unit 0 Chip Select 0 End Address | 0x63FFFFFF (64MB Size) | 0x63FFFFFF (64MB Size) |
Unit 0 Chip Select 1 Start Address | 0x64000000 (Fixed) | 0x64000000 (Fixed) |
Unit 0 Chip Select 1 End Address | 0x640FFFFF (default) | 0x640FFFFF (default) |
Unit 1 Chip Select 0 Start Address | 0x68000000 (Fixed) | 0x68000000 (Fixed) |
Unit 1 Chip Select 0 End Address | 0x680FFFFF (default) | 0x680FFFFF (default) |
Unit 1 Chip Select 1 Start Address | 0x6C000000 (Fixed) | 0x6C000000 (Fixed) |
Unit 1 Chip Select 1 End Address | 0x6C0FFFFF (default) | 0x6C0FFFFF (default) |
This driver allows user to dynamically select whether to access memory space or register space. Call R_XSPI_HYPER_AccessSpaceSet(), and assign HYPERBUS_SPACE_SELECT_MEMORY_SPACE or HYPERBUS_SPACE_SELECT_REGISTER_SPACE to the second argument.
Note that register space access is in limited situations, such as when changing the HyperRAM device-specific configuration.
This is a basic example of minimal use of the HyperBus module in an application.
This is an example of using R_XSPI_HYPER_AccessSpaceSet() to change the address space from memory to register.
This is an example of using R_XSPI_HYPER_DirectTransfer with read direction to read identification register 0 value from HyperRAM device.
This is an example of changing the initial latency of HyperRAM. By sending register access command, rewrite the value of Confiugration register 0 of HyperRAM device.
The initial latency can be changed by changing the settings of bits [7:4] of CR0. The sample code describes the case of changing from the factory default 6 cycle latency (at a maximum operating frequency of 166 MHz) to 4 cycle latency (at a maximum operating frequency of 100 MHz). Set the latency cycle for the HyperBus controller and HyperRAM according to the specification of the using HyperRAM.
Data Structures | |
struct | xspi_hyper_instance_ctrl_t |
Enumerations | |
enum | xspi_hyper_chip_select_t |
enum | xspi_hyper_device_type_t |
enum | xspi_hyper_memory_size_t |
enum | xspi_hyper_transaction_interval_clocks_t |
enum | xspi_hyper_cs_pulldown_clocks_t |
enum | xspi_hyper_cs_pullup_clocks_t |
enum | xspi_hyper_prefetch_function_t |
enum | xspi_hyper_io_voltage_t |
struct xspi_hyper_instance_ctrl_t |
Instance control block. DO NOT INITIALIZE. Initialization occurs when hyperbus_api_t::open is called
fsp_err_t R_XSPI_HYPER_Open | ( | hyperbus_ctrl_t * | p_ctrl, |
hyperbus_cfg_t const *const | p_cfg | ||
) |
Open the HYPER driver module. After the driver is open, the HyperRAM can be accessed like internal memory.
Implements hyperbus_api_t::open.
FSP_SUCCESS | Configuration was successful. |
FSP_ERR_ASSERTION | The parameter p_ctrl or p_cfg is NULL. |
FSP_ERR_ALREADY_OPEN | Driver has already been opened with the same p_ctrl. |
fsp_err_t R_XSPI_HYPER_Close | ( | hyperbus_ctrl_t * | p_ctrl | ) |
Close the HYPER driver module.
Implements hyperbus_api_t::close.
FSP_SUCCESS | Configuration was successful. |
FSP_ERR_ASSERTION | p_instance_ctrl is NULL. |
FSP_ERR_NOT_OPEN | Driver is not opened. |
fsp_err_t R_XSPI_HYPER_BurstTypeSet | ( | hyperbus_ctrl_t * | p_ctrl, |
hyperbus_burst_type_t | burst_type | ||
) |
Dynamic burst type configuration.
Implements hyperbus_api_t::burstTypeSet
FSP_ERR_UNSUPPORTED | API not supported by Hyper - HyperRAM. (Only can use Linear Burst) |
fsp_err_t R_XSPI_HYPER_AccessSpaceSet | ( | hyperbus_ctrl_t * | p_ctrl, |
hyperbus_space_select_t | access_space | ||
) |
Dynamic access address space configuration.
Implements hyperbus_api_t::accessSpaceSet
FSP_SUCCESS | Address space successfully changed as specified by the argument. |
FSP_ERR_ASSERTION | The parameter p_ctrl is NULL. |
FSP_ERR_NOT_OPEN | Driver is not opened. |
fsp_err_t R_XSPI_HYPER_DirectTransfer | ( | hyperbus_ctrl_t *const | p_ctrl, |
hyperbus_direct_transfer_t *const | p_transfer | ||
) |
Read/Write raw data directly with the HyperRAM.
Implements hyperbus_api_t::directTransfer.
FSP_SUCCESS | The flash was programmed successfully. |
FSP_ERR_ASSERTION | A required pointer is NULL. |
FSP_ERR_NOT_OPEN | Driver is not opened. |
fsp_err_t R_XSPI_HYPER_Write | ( | hyperbus_ctrl_t * | p_ctrl, |
uint8_t const *const | p_src, | ||
uint8_t *const | p_dest, | ||
uint32_t | byte_count | ||
) |
Program a page of data to the flash.
Implements hyperbus_api_t::write.
FSP_ERR_UNSUPPORTED | API not supported by HyperBus - HyperRAM. |
fsp_err_t R_XSPI_HYPER_Erase | ( | hyperbus_ctrl_t * | p_ctrl, |
uint8_t *const | p_device_address, | ||
uint32_t | byte_count | ||
) |
Erase a block or sector of flash. The byte_count must exactly match one of the erase sizes defined in hyperbus_cfg_t. For chip erase, byte_count must be HYPER_FLASH_ERASE_SIZE_CHIP_ERASE.
Implements hyperbus_api_t::erase.
FSP_ERR_UNSUPPORTED | API not supported by HyperBus - HyperRAM. |
fsp_err_t R_XSPI_HYPER_StatusGet | ( | hyperbus_ctrl_t * | p_ctrl, |
hyperbus_status_t *const | p_status | ||
) |
Gets the write or erase status of the flash.
Implements hyperbus_api_t::statusGet.
FSP_ERR_UNSUPPORTED | API not supported by HyperBus - HyperRAM. |
fsp_err_t R_XSPI_HYPER_AutoCalibrate | ( | hyperbus_ctrl_t * | p_ctrl | ) |
Auto-calibrate the HyperRAM device using the preamble pattern.
Implements hyperbus_api_t::autoCalibrate.
FSP_ERR_UNSUPPORTED | API not supported by HyperBus - HyperFlash. (Planned support for FSP v2.1.0 or later.) |