Functions
fsp_err_t	R_DMAC_Open (transfer_ctrl_t const p_api_ctrl, transfer_cfg_t const const p_cfg)

fsp_err_t	R_DMAC_Reconfigure (transfer_ctrl_t const p_api_ctrl, transfer_info_t p_info)

fsp_err_t	R_DMAC_Reset (transfer_ctrl_t const p_api_ctrl, void const volatile p_src, void *volatile p_dest, uint16_t const num_transfers)

fsp_err_t	R_DMAC_SoftwareStart (transfer_ctrl_t *const p_api_ctrl, transfer_start_mode_t mode)

fsp_err_t	R_DMAC_SoftwareStop (transfer_ctrl_t *const p_api_ctrl)

fsp_err_t	R_DMAC_Enable (transfer_ctrl_t *const p_api_ctrl)

fsp_err_t	R_DMAC_Disable (transfer_ctrl_t *const p_api_ctrl)

fsp_err_t	R_DMAC_InfoGet (transfer_ctrl_t const p_api_ctrl, transfer_properties_t const p_info)

fsp_err_t	R_DMAC_Reload (transfer_ctrl_t const p_api_ctrl, void const p_src, void *p_dest, uint32_t const num_transfers)

fsp_err_t	R_DMAC_CallbackSet (transfer_ctrl_t const p_api_ctrl, void(p_callback)(dmac_callback_args_t ), void const const p_context, dmac_callback_args_t *const p_callback_memory)

fsp_err_t	R_DMAC_Close (transfer_ctrl_t *const p_api_ctrl)

Detailed Description

Driver for the DMAC peripheral on RA MCUs. This module implements the Transfer Interface.

Overview

The Direct Memory Access Controller (DMAC) transfers data from one memory location to another without using the CPU.

Features

Supports multiple transfer modes
- Normal transfer
- Repeat transfer
- Block transfer
- Repeat-Block transfer (Not available on all MCUs)
Address increment, decrement, fixed, or offset modes
Triggered by ELC events
- Some exceptions apply, see the Event table in the Event Numbers section of the Interrupt Controller Unit chapter of the hardware manual
Supports 1, 2, and 4 byte data units

Configuration

Build Time Configurations for r_dmac

The following build time configurations are defined in fsp_cfg/r_dmac_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.

Configurations for Transfer > Transfer (r_dmac)

This module can be added to the Stacks tab via New Stack > Transfer > Transfer (r_dmac).

Configuration	Options	Default	Description
Name	Name must be a valid C symbol	g_transfer0	Module name.
Channel	Value must be a non-negative integer	0	Specify the hardware channel.
Mode	MCU Specific Options		Select the transfer mode. Normal: One transfer per activation, transfer ends after Number of Transfers; Repeat: One transfer per activation, Repeat Area address reset after Number of Transfers, transfer ends after Number of Blocks; Block: Number of Blocks per activation, Repeat Area address reset after Number of Transfers, transfer ends after Number of Blocks.
Transfer Size	1 Byte 2 Bytes 4 Bytes	2 Bytes	Select the transfer size.
Destination Address Mode	Fixed Offset addition Incremented Decremented	Fixed	Select the address mode for the destination.
Source Address Mode	Fixed Offset addition Incremented Decremented	Fixed	Select the address mode for the source.
Repeat Area (Unused in Normal Mode)	Destination Source	Source	Select the repeat area. Either the source or destination address resets to its initial value after completing Number of Transfers in Repeat or Block mode.
Number of Transfers	Value must be a non-negative integer	1	Specify the number of transfers for repeat and normal mode or block size for repeat-block transfer mode.
Number of Blocks (Valid only in Repeat,Block or Repeat-Block Mode)	Value must be a non-negative integer	0	Specify the number of blocks to transfer in Repeat,Block or Repeat-Block mode.
Activation Source	MCU Specific Options		Select the DMAC transfer start event. If no ELC event is chosen then software start can be used.
Callback	Name must be a valid C symbol	NULL	A user callback that is called at the end of the transfer.
Transfer End Interrupt Priority	MCU Specific Options		Select the transfer end interrupt priority.
Interrupt Frequency	Interrupt after all transfers have completed Interrupt after each block, or repeat size is transfered	Interrupt after all transfers have completed	Select to have interrupt after each transfer or after last transfer.
Offset value (Valid only when address mode is \'Offset\')	Value must be a 24 bit signed integer.	1	Offset value is added to the address after each transfer.
Source Buffer Size	Value must be a non-negative integer with a maximum configurable value of 65535.	1	Specify the size of whole source buffer (valid only for Repeat-Block transfer mode with source address update mode other than offset addition).

Clock Configuration

The DMAC peripheral module uses ICLK as the clock source. The ICLK frequency is set by using the Clocks tab of the RA Configuration editor prior to a build, or by using the CGC module at run-time.

Pin Configuration

This module does not use I/O pins.

Usage Notes

Source and Destination Configuration

R_DMAC_Reset() API function should be called to set the source and destination before starting transfer operation.

Transfer Modes

The DMAC Module supports three modes of operation.

Normal Mode - In normal mode, a single data unit is transfered every time the configured ELC event is received by the DMAC channel. A data unit can be 1-byte, 2-bytes, or 4-bytes. The source and destination addresses can be fixed, increment, decrement, or add an offset to the next data unit after each transfer. A 16-bit counter decrements after each transfer. When the counter reaches 0, transfers will no longer be triggered by the ELC event and the CPU can be interrupted to signal that all transfers have finished.
Repeat Mode - Repeat mode works the same way as normal mode, however the length is limited to an integer in the range[1,1024]. When the transfer counter reaches 0, the counter is reset to its configured value, the repeat area (source or destination address) resets to its starting address and the block count remaining will decrement by 1. When the block count reaches 0, transfers will no longer be triggered by the ELC event and the CPU may be interrupted to signal that all transfers have finished.
Block Mode - In block mode, the amount of data units transfered by each interrupt can be set to an integer in the range [1,1024]. The number of blocks to transfer can also be configured to a 16-bit number. After each block transfer the repeat area (source or destination address) will reset to the original address and the other address will be incremented or decremented to the next block.
Repeat-Block Mode - In repeat-block mode, the amount of data units transfered by each interrupt can be set to an integer in the range [1,1024]. The number of blocks to transfer can be configured to a 16 bit number. If the destination address mode is offset mode, maximum configurable number of blocks is 0xFFFF for block size(length) of one with data transfer size as byte,0x7FFF for block size of one with data transfer size as half word and 0x3FFF for block size of one with data size as word. After each block transfer the source address and the destination address will be incremented or decremented to the next block address. In case of offset address mode for source address, the source address size is the total size of source buffer after which the source area is rolled over, block size can be smaller than the source buffer size.For source address mode as offset mode, the maximum configurable source buffer size is 0xFFFF for transfer data size of a byte,0x7FFF for transfer data size of half word and 0x3FFF for transfer data size of word. Repeat-block mode can be used to implement single ring buffer to multiple ring buffer transfer type design.

Selecting the DTC or DMAC

The Transfer API is implemented by both DTC and the DMAC so that applications can switch between the DTC and the DMAC. When selecting between them, consider these factors:

	DTC	DMAC
Repeat Mode	Repeats forever Max repeat size is 256 x 4 bytes	Configurable number of repeats Max repeat size is 1024 x 4 bytes
Block Mode	Max block size is 256 x 4 bytes	Max block size is 1024 x 4 bytes
Channels	One instance per interrupt	MCU specific (8 channels or less)
Chained Transfers	Supported	Not Supported
Software Trigger	Must use the software ELC event	Has support for software trigger without using software ELC event Supports TRANSFER_START_MODE_SINGLE and TRANSFER_START_MODE_REPEAT
Offset Address Mode	Not supported	Supported

Interrupts

The DTC and DMAC interrupts behave differently. The DTC uses the configured IELSR event IRQ as the interrupt source whereas each DMAC channel has its own IRQ.

The transfer_info_t::irq setting also behaves a little differently depending on which mode is selected.

Normal Mode

	DTC	DMAC
TRANSFER_IRQ_EACH	Interrupt after each transfer	N/A
TRANSFER_IRQ_END	Interrupt after last transfer	Interrupt after last transfer

Repeat Mode

	DTC	DMAC
TRANSFER_IRQ_EACH	Interrupt after each transfer	Interrupt after each repeat
TRANSFER_IRQ_END	Interrupt after each repeat	Interrupt after last transfer

Block Mode

	DTC	DMAC
TRANSFER_IRQ_EACH	Interrupt after each block	Interrupt after each block
TRANSFER_IRQ_END	Interrupt after last block	Interrupt after last block

Repeat-block Mode

	DTC	DMAC
TRANSFER_IRQ_EACH	N/A	N/A
TRANSFER_IRQ_END	N/A	Interrupt after last block

Additional Considerations

The DTC requires a moderate amount of RAM (one transfer_info_t struct per open instance + DTC_VECTOR_TABLE_SIZE).
The DTC stores transfer information in RAM and writes back to RAM after each transfer whereas the DMAC stores all transfer information in registers.
When transfers are configured for more than one activation source, the DTC must fetch the transfer info from RAM on each interrupt. This can cause a higher latency between transfers.

Offset Address Mode

When the source or destination mode is configured to offset mode, a configurable offset is added to the source or destination pointer after each transfer. The offset is a signed 24 bit number.

Examples

Basic Example

This is a basic example of minimal use of the DMAC in an application. In this case, one or more events have been routed to the DMAC for handling so it only needs to be enabled to start accepting transfers.

void dmac_minimal_example (void)
{
    /* Open the transfer instance with initial configuration. */
    fsp_err_t err = R_DMAC_Open(&g_transfer_ctrl, &g_transfer_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Enable the DMAC so that it responds to transfer requests. */
    err = R_DMAC_Enable(&g_transfer_ctrl);
    assert(FSP_SUCCESS == err);
}

CRC32 Example

In this example the DMAC is used to feed the CRC peripheral to perform a CRC32 operation.

volatile bool g_transfer_complete = false;
void dmac_callback (dmac_callback_args_t * cb_data)
{
    FSP_PARAMETER_NOT_USED(cb_data);
    g_transfer_complete = true;
}
void dmac_crc_example (void)
{
    uint8_t p_src[TRANSFER_LENGTH];
    /* Initialize p_src to [ABC..OP] */
    for (uint32_t i = 0; i < TRANSFER_LENGTH; i++)
    {
        p_src[i] = (uint8_t) ('A' + (i % 26));
    }
    /* Set transfer source address to p_src */
    g_transfer_cfg.p_info->p_src = (void *) p_src;
    /* Set transfer destination address to the CRC data input register */
    g_transfer_cfg.p_info->p_dest = (void *) &R_CRC->CRCDIR;
    /* Open the transfer instance with initial configuration. */
    fsp_err_t err = R_DMAC_Open(&g_transfer_ctrl, &g_transfer_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Enable DMAC transfers. */
    (void) R_DMAC_Enable(&g_transfer_ctrl);
    /* Open the CRC module. */
    err = R_CRC_Open(&g_crc_ctrl, &g_crc_cfg);
    assert(FSP_SUCCESS == err);
    /* Clear the transfer complete flag. */
    g_transfer_complete = false;
    /* Trigger the transfer using software. */
    err = R_DMAC_SoftwareStart(&g_transfer_ctrl, TRANSFER_START_MODE_SINGLE);
    assert(FSP_SUCCESS == err);
    while (!g_transfer_complete)
    {
        /* Wait for transfer complete interrupt */
    }
    /* Get CRC result and perform final XOR. */
    uint32_t crc32;
    (void) R_CRC_CalculatedValueGet(&g_crc_ctrl, &crc32);
    crc32 ^= CRC32_FINAL_XOR_VALUE;
    /* Verify that the CRC32 is calculated correctly. */
    /* CRC32("ABCD...NOP") = 0xE0E8FF4D. */
    const uint32_t expected_crc32 = 0xE0E8FF4D;
    if (expected_crc32 != crc32)
    {
        /* Handle any CRC errors. This function should be defined by the user. */
        handle_crc_error();
    }
}

Data Structures
struct	dmac_instance_ctrl_t

struct	dmac_extended_cfg_t

Macros
#define	DMAC_MAX_NORMAL_TRANSFER_LENGTH

#define	DMAC_MAX_REPEAT_TRANSFER_LENGTH

#define	DMAC_MAX_BLOCK_TRANSFER_LENGTH

#define	DMAC_MAX_REPEAT_COUNT

#define	DMAC_MAX_BLOCK_COUNT

Data Structure Documentation

◆ dmac_instance_ctrl_t

struct dmac_instance_ctrl_t

Control block used by driver. DO NOT INITIALIZE - this structure will be initialized in transfer_api_t::open.

◆ dmac_extended_cfg_t

struct dmac_extended_cfg_t

DMAC transfer configuration extension. This extension is required.

Data Fields
uint8_t	channel
	Channel number, does not apply to all HAL drivers.

IRQn_Type	irq
	DMAC interrupt number.

uint8_t	ipl
	DMAC interrupt priority.

int32_t	offset
	Offset value used with transfer_addr_mode_t::TRANSFER_ADDR_MODE_OFFSET.

uint16_t	src_buffer_size

elc_event_t	activation_source

void(*	p_callback )(dmac_callback_args_t *cb_data)

void const *	p_context

Field Documentation

◆ src_buffer_size

uint16_t dmac_extended_cfg_t::src_buffer_size

Source ring buffer size for TRANSFER_MODE_REPEAT_BLOCK.

◆ activation_source

elc_event_t dmac_extended_cfg_t::activation_source

Select which event will trigger the transfer.

Note: Select ELC_EVENT_NONE for software activation in order to use softwareStart and softwareStart to trigger transfers.

◆ p_callback

void(* dmac_extended_cfg_t::p_callback) (dmac_callback_args_t *cb_data)

Callback for transfer end interrupt.

◆ p_context

void const* dmac_extended_cfg_t::p_context

Placeholder for user data. Passed to the user p_callback in transfer_callback_args_t.

Macro Definition Documentation

◆ DMAC_MAX_NORMAL_TRANSFER_LENGTH

#define DMAC_MAX_NORMAL_TRANSFER_LENGTH

Max configurable number of transfers in TRANSFER_MODE_NORMAL.

◆ DMAC_MAX_REPEAT_TRANSFER_LENGTH

#define DMAC_MAX_REPEAT_TRANSFER_LENGTH

Max number of transfers per repeat for TRANSFER_MODE_REPEAT.

◆ DMAC_MAX_BLOCK_TRANSFER_LENGTH

#define DMAC_MAX_BLOCK_TRANSFER_LENGTH

Max number of transfers per block in TRANSFER_MODE_BLOCK

◆ DMAC_MAX_REPEAT_COUNT

#define DMAC_MAX_REPEAT_COUNT

Max configurable number of repeats to trasnfer in TRANSFER_MODE_REPEAT

◆ DMAC_MAX_BLOCK_COUNT

#define DMAC_MAX_BLOCK_COUNT

Max configurable number of blocks to transfer in TRANSFER_MODE_BLOCK

Function Documentation

◆ R_DMAC_Open()

fsp_err_t R_DMAC_Open	(	transfer_ctrl_t *const	p_api_ctrl,
		transfer_cfg_t const *const	p_cfg
	)

Configure a DMAC channel.

Return values

FSP_SUCCESS	Successful open.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_IP_CHANNEL_NOT_PRESENT	The configured channel is invalid.
FSP_ERR_IRQ_BSP_DISABLED	The IRQ associated with the activation source is not enabled in the BSP.
FSP_ERR_ALREADY_OPEN	The control structure is already opened.

◆ R_DMAC_Reconfigure()

fsp_err_t R_DMAC_Reconfigure	(	transfer_ctrl_t *const	p_api_ctrl,
		transfer_info_t *	p_info
	)

Reconfigure the transfer with new transfer info.

Return values

FSP_SUCCESS	Transfer is configured and will start when trigger occurs.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_ENABLED	DMAC is not enabled. The current configuration must not be valid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.

◆ R_DMAC_Reset()

fsp_err_t R_DMAC_Reset	(	transfer_ctrl_t *const	p_api_ctrl,
		void const *volatile	p_src,
		void *volatile	p_dest,
		uint16_t const	num_transfers
	)

Reset transfer source, destination, and number of transfers.

Return values

FSP_SUCCESS	Transfer reset successfully.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_ENABLED	DMAC is not enabled. The current configuration must not be valid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.

◆ R_DMAC_SoftwareStart()

fsp_err_t R_DMAC_SoftwareStart	(	transfer_ctrl_t *const	p_api_ctrl,
		transfer_start_mode_t	mode
	)

If the mode is TRANSFER_START_MODE_SINGLE initiate a single transfer with software. If the mode is TRANSFER_START_MODE_REPEAT continue triggering transfers until all of the transfers are completed.

Return values

FSP_SUCCESS	Transfer started written successfully.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.
FSP_ERR_UNSUPPORTED	Handle was not configured for software activation.

◆ R_DMAC_SoftwareStop()

fsp_err_t R_DMAC_SoftwareStop ( transfer_ctrl_t *const p_api_ctrl )

Stop software transfers if they were started with TRANSFER_START_MODE_REPEAT.

Return values

FSP_SUCCESS	Transfer stopped written successfully.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.

◆ R_DMAC_Enable()

fsp_err_t R_DMAC_Enable ( transfer_ctrl_t *const p_api_ctrl )

Enable transfers for the configured activation source.

Return values

FSP_SUCCESS	Counter value written successfully.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.

◆ R_DMAC_Disable()

fsp_err_t R_DMAC_Disable ( transfer_ctrl_t *const p_api_ctrl )

Disable transfers so that they are no longer triggered by the activation source.

Return values

FSP_SUCCESS	Counter value written successfully.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.

◆ R_DMAC_InfoGet()

fsp_err_t R_DMAC_InfoGet	(	transfer_ctrl_t *const	p_api_ctrl,
		transfer_properties_t *const	p_info
	)

Set driver specific information in provided pointer.

Return values

FSP_SUCCESS	Information has been written to p_info.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.
FSP_ERR_ASSERTION	An input parameter is invalid.

◆ R_DMAC_Reload()

fsp_err_t R_DMAC_Reload	(	transfer_ctrl_t *const	p_api_ctrl,
		void const *	p_src,
		void *	p_dest,
		uint32_t const	num_transfers
	)

To update next transfer information without interruption during transfer.

Return values

FSP_ERR_UNSUPPORTED This feature is not supported.

◆ R_DMAC_CallbackSet()

fsp_err_t R_DMAC_CallbackSet	(	transfer_ctrl_t *const	p_api_ctrl,
		void()(dmac_callback_args_t )	p_callback,
		void const *const	p_context,
		dmac_callback_args_t *const	p_callback_memory
	)

Updates the user callback with the option to provide memory for the callback argument structure.

Return values

FSP_SUCCESS	Callback updated successfully.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened.

◆ R_DMAC_Close()

fsp_err_t R_DMAC_Close ( transfer_ctrl_t *const p_api_ctrl )

Disable transfer and clean up internal data. Implements transfer_api_t::close.

Return values

FSP_SUCCESS	Successful close.
FSP_ERR_ASSERTION	An input parameter is invalid.
FSP_ERR_NOT_OPEN	Handle is not initialized. Call R_DMAC_Open to initialize the control block.

Functions

Detailed Description

Overview

Features

Configuration

Build Time Configurations for r_dmac

Configurations for Transfer > Transfer (r_dmac)

Clock Configuration

Pin Configuration

Usage Notes

Source and Destination Configuration

Transfer Modes

Selecting the DTC or DMAC

Interrupts

Normal Mode

Repeat Mode

Block Mode

Repeat-block Mode

Additional Considerations

Offset Address Mode

Examples

Basic Example

CRC32 Example

Data Structures

Macros

Data Structure Documentation

◆ dmac_instance_ctrl_t

◆ dmac_extended_cfg_t

Data Fields

Field Documentation

◆ src_buffer_size

◆ activation_source

◆ p_callback

◆ p_context

Macro Definition Documentation

◆ DMAC_MAX_NORMAL_TRANSFER_LENGTH

◆ DMAC_MAX_REPEAT_TRANSFER_LENGTH

◆ DMAC_MAX_BLOCK_TRANSFER_LENGTH

◆ DMAC_MAX_REPEAT_COUNT

◆ DMAC_MAX_BLOCK_COUNT

Function Documentation

◆ R_DMAC_Open()

◆ R_DMAC_Reconfigure()

◆ R_DMAC_Reset()

◆ R_DMAC_SoftwareStart()

◆ R_DMAC_SoftwareStop()

◆ R_DMAC_Enable()

◆ R_DMAC_Disable()

◆ R_DMAC_InfoGet()

◆ R_DMAC_Reload()

◆ R_DMAC_CallbackSet()

◆ R_DMAC_Close()