RA Flexible Software Package Documentation  Release v5.2.0

 
Functions | Data Structures | Enumerations
OSPI Flash (r_ospi)
Modules » Storage

Functions

fsp_err_t R_OSPI_Open (spi_flash_ctrl_t *const p_ctrl, spi_flash_cfg_t const *const p_cfg)
 
fsp_err_t R_OSPI_DirectWrite (spi_flash_ctrl_t *const p_ctrl, uint8_t const *const p_src, uint32_t const bytes, bool const read_after_write)
 
fsp_err_t R_OSPI_DirectRead (spi_flash_ctrl_t *const p_ctrl, uint8_t *const p_dest, uint32_t const bytes)
 
fsp_err_t R_OSPI_DirectTransfer (spi_flash_ctrl_t *const p_ctrl, spi_flash_direct_transfer_t *const p_transfer, spi_flash_direct_transfer_dir_t direction)
 
fsp_err_t R_OSPI_XipEnter (spi_flash_ctrl_t *const p_ctrl)
 
fsp_err_t R_OSPI_XipExit (spi_flash_ctrl_t *const p_ctrl)
 
fsp_err_t R_OSPI_Write (spi_flash_ctrl_t *const p_ctrl, uint8_t const *const p_src, uint8_t *const p_dest, uint32_t byte_count)
 
fsp_err_t R_OSPI_Erase (spi_flash_ctrl_t *const p_ctrl, uint8_t *const p_device_address, uint32_t byte_count)
 
fsp_err_t R_OSPI_StatusGet (spi_flash_ctrl_t *const p_ctrl, spi_flash_status_t *const p_status)
 
fsp_err_t R_OSPI_BankSet (spi_flash_ctrl_t *const p_ctrl, uint32_t bank)
 
fsp_err_t R_OSPI_SpiProtocolSet (spi_flash_ctrl_t *const p_ctrl, spi_flash_protocol_t spi_protocol)
 
fsp_err_t R_OSPI_AutoCalibrate (spi_flash_ctrl_t *const p_ctrl)
 
fsp_err_t R_OSPI_Close (spi_flash_ctrl_t *const p_ctrl)
 

Detailed Description

Driver for the OSPI peripheral on RA MCUs. This module implements the SPI Flash Interface.

Overview

The OSPI peripheral interfaces with an external OctaFlash and/or OctaRAM chip(s) to perform data I/O Operations. When both OctaFlash and OctaRAM devices are interfaced, they must be connected to their own chip-select lines. The devices cannot share a single chip-select line.

Features

The OSPI driver has the following key features to support the OctaFlash device:

The OSPI driver has the following key features to support the OctaRAM device:

Additional build-time features:

Note
For OctaFlash, use of DMAC for data transmission is strongly recommended. Without the use of DMAC, due to the high-speed hardware design of the OSPI peripheral, data transmission can be sensitive to timing variance, which could cause software-based memory-mapped operations to fail unexpectedly.

Configuration

OSPI Flash:

Build Time Configurations for r_ospi

The following build time configurations are defined in driver/r_ospi_cfg.h:

ConfigurationOptionsDefaultDescription
Parameter Checking
  • Default (BSP)
  • Enabled
  • Disabled
Default (BSP) If selected code for parameter checking is included in the build.
DMAC Support
  • Enable
  • Disable
Disable Enable DMAC support for the OSPI module.

Configurations for Storage > OSPI Flash (r_ospi)

This module can be added to the Stacks tab via New Stack > Storage > OSPI Flash (r_ospi).

ConfigurationOptionsDefaultDescription
General
General > Single Continuous Mode
Read Idle TimeMust be an integer greater than 0 with maximum configurable value of 127100 Specify the read idle time.
Write Idle TimeMust be an integer greater than 0 with maximum configurable value of 127100 Specify the write idle time.
NameName must be a valid C symbolg_ospi0 Module name.
ChannelChannel should be 0 or 10 Specify the OSPI chip select line to use.
Flash SizeMust be an integer greater than 0 with maximum configurable value of 0x3FFFFFFF0x04000000 Specify the OctaFlash size in bytes.
SPI Protocol
  • SPI
  • Single data rate OPI
  • Dual data rate OPI
SPI Select the initial SPI protocol. SPI protocol can be changed on the OctaFlash using R_OSPI_DirectTransfer().
Address Bytes
  • 3
  • 4
4 Select the number of address bytes.
OPI Mode
OPI Mode > Auto-Calibration
Data latching delayMust be a valid non-negative integer with maximum configurable value of 0xFF0x80 Set this to 0 to enable auto-calibration. 0x80 is the default value calculated at 3.3V and 25°C
Auto-Calibration AddressMust be a valid non-negative integer with maximum configurable value of 0xFFFFFFFF0x00 Set the address of the read/write destination to be performed for auto-calibration.
OPI Mode > Command Definitions
Page Program CommandMust be a 16-bit OSPI Page Program Command under OPI Mode|Command Definitions0x12ED The command to program a page in OPI mode.
Read CommandMust be a 16-bit OSPI Read Command under OPI Mode|Command Definitions0xEC13 The command to read in SOPI mode (8READ).
Dual Read CommandMust be a 16-bit OSPI Dual Read Command under OPI Mode|Command Definitions0xEE11 The command to read in DOPI mode (8DTRD).
Write Enable CommandMust be a 16-bit OSPI Write Enable Command under OPI Mode|Command Definitions0x06F9 The command to enable write in OPI mode.
Status CommandMust be a 16-bit OSPI Status Command under OPI Mode|Command Definitions0x05FA The command to query the status of a write or erase command in OPI mode.
OPI Mode > OM_DQS Enable Counter
SOPIMust be an integer between 0 and 2559 OM_DQS enable counter for memory access. Setting for SOPI mode.
DOPIMust be an integer between 0 and 2556 OM_DQS enable counter for memory access. Setting for DOPI mode.
Command Length BytesMust be an integer between 1 and 22 Command length in bytes
Memory Read Dummy CyclesMust be an integer between 6 and 1010 Memory read dummy cycles
Status Read Dummy CyclesMust be an integer between 0 and 2554 Status read dummy cycles
DOPI Byte Order
  • Byte0, Byte1, Byte2, Byte3
  • Byte1, Byte0, Byte3, Byte2
Byte0, Byte1, Byte2, Byte3 Byte order on the external bus
SPI Mode
SPI Mode > Command Definitions
Page Program CommandMust be a 8-bit OSPI Page Program Command under SPI Mode|Command Definitions0x12 The command to program a page in SPI mode.
Read CommandMust be a 8-bit OSPI Read Command under SPI Mode|Command Definitions0x13 The command to read in SPI mode.
Write Enable CommandMust be a 16-bit OSPI Write Enable Command under SPI Mode|Command Definitions0x06 The command to enable write in SPI mode.
Status CommandMust be a 16-bit OSPI Status Command under SPI Mode|Command Definitions0x05 The command to query the status of a write or erase command in SPI mode.
Common Command Definitions
Sector Erase CommandMust be a value greater than or equal to 00x21DE The command to erase a sector. Set Sector Erase Size to 0 if unused.
Block Erase CommandMust be a value greater than or equal to 00xDC23 The command to erase a block. Set Block Erase Size to 0 if unused.
Chip Erase CommandMust be a value greater than or equal to 00xC738 The command to erase the entire chip. Set Chip Erase Command to 0 if unused.
Write Status BitMust be an integer between 0 and 70 Which bit contains the write in progress status returned from the Write Status Command.
Write Enable BitMust be an integer between 0 and 71 Which bit contains the write enable status returned from the Write Enable Command.
Sector Erase SizeMust be an integer greater than or equal to 04096 The sector erase size. Set Sector Erase Size to 0 if Sector Erase is not supported.
Block Erase SizeMust be an integer greater than or equal to 065536 The block erase size. Set Block Erase Size to 0 if Block Erase is not supported.
Chip Select Timing Setting
Memory Mapped Read Command Interval
  • 2
  • 5
  • 7
  • 9
  • 11
  • 13
  • 15
  • 17
2 Memory mapped read command execution interval setting in OCTACLK units
Memory Mapped Write Command Interval
  • 2
  • 5
  • 7
  • 9
  • 11
  • 13
  • 15
  • 17
2 Memory mapped write command execution interval setting in OCTACLK units
Command Interval
  • 2
  • 5
  • 7
  • 9
  • 11
  • 13
  • 15
  • 17
2 Command execution interval setting in OCTACLK units
Memory Mapped Read Pull-up Timing
  • 5 SPI/SOPI
  • 6 SPI/SOPI
  • 7 SPI/SOPI, 6.5 DOPI
  • 8 SPI/SOPI, 7.5 DOPI
  • 9 SPI/SOPI, 8.5 DOPI
5 SPI/SOPI Memory mapped read signal pull-up timing setting in OCTACLK units
Memory Mapped Write Pull-up Timing
  • 2 SPI/SOPI, 1.5 DOPI
  • 3 SPI/SOPI, 2.5 DOPI
  • 4 SPI/SOPI, 3.5 DOPI
  • 5 SPI/SOPI, 4.5 DOPI
  • 6 SPI/SOPI, 5.5 DOPI
  • 7 SPI/SOPI, 6.5 DOPI
  • 8 SPI/SOPI, 7.5 DOPI
  • 9 SPI/SOPI, 8.5 DOPI
2 SPI/SOPI, 1.5 DOPI Memory mapped write signal pull-up timing setting in OCTACLK units
Pull-up Timing
  • 5 SPI/SOPI
  • 6 SPI/SOPI
  • 7 SPI/SOPI, 6.5 DOPI
  • 8 SPI/SOPI, 7.5 DOPI
  • 9 SPI/SOPI, 8.5 DOPI
5 SPI/SOPI Signal pull-up timing setting in OCTACLK units
Memory Mapped Read Pull-down Timing
  • 3 SPI/SOPI, 2.5 DOPI
  • 4 SPI/SOPI, 3.5 DOPI
  • 5 SPI/SOPI, 4.5 DOPI
3 SPI/SOPI, 2.5 DOPI Memory mapped read signal pull-down timing setting in OCTACLK units
Memory Mapped Write Pull-down Timing
  • 3 SPI/SOPI, 2.5 DOPI
  • 4 SPI/SOPI, 3.5 DOPI
  • 5 SPI/SOPI, 4.5 DOPI
3 SPI/SOPI, 2.5 DOPI Memory mapped write signal pull-down timing setting in OCTACLK units
Pull-down Timing
  • 3 SPI/SOPI, 2.5 DOPI
  • 4 SPI/SOPI, 3.5 DOPI
  • 5 SPI/SOPI, 4.5 DOPI
3 SPI/SOPI, 2.5 DOPI Signal pull-down timing setting in OCTACLK units

Note
The user is expected to modify the command definitions based on the OctaFlash chip and SPI communication mode. The default mode is SPI mode and default erase commands are set for OPI mode based on Macronix OctaFlash MX25LM51245G.

OSPI RAM:

Build Time Configurations for r_ospi

The following build time configurations are defined in driver/r_ospi_cfg.h:

ConfigurationOptionsDefaultDescription
Parameter Checking
  • Default (BSP)
  • Enabled
  • Disabled
Default (BSP) If selected code for parameter checking is included in the build.
DMAC Support
  • Enable
  • Disable
Disable Enable DMAC support for the OSPI module.

Configurations for Storage > OSPI RAM (r_ospi)

This module can be added to the Stacks tab via New Stack > Storage > OSPI RAM (r_ospi).

ConfigurationOptionsDefaultDescription
General
General > Single Continuous Mode
Read Idle TimeMust be an integer greater than 0 with maximum configurable value of 127127 Specify the read idle time.
Write Idle TimeMust be an integer greater than 0 with maximum configurable value of 127127 Specify the write idle time.
NameName must be a valid C symbolg_ospi_ram0 Module name.
ChannelChannel should be 0 or 1 [Channel 0 recommended]0 Specify the OSPI chip select line to use.
RAM SizeMust be an integer greater than 0 with maximum configurable value of 0x008000000x00800000 Specify the OctaRam size in bytes.
SPI ProtocolDual data rate OPIDual data rate OPI Select the initial SPI protocol. OctaRAM only supports DOPI mode.
Address Bytes44 Select the number of address bytes. OctaRAM only supports 4 byte addresses in DOPI mode.
Auto-Calibration
Data latching delayMust be a valid non-negative integer with maximum configurable value of 0xFF0x80 Set this to 0 to enable auto-calibration. 0x80 is the default value calculated at 3.3V and 25°C
Auto-Calibration AddressMust be a valid non-negative integer with maximum configurable value of 0xFFFFFFFF0x00 Set the address of the read/write destination to be performed for auto-calibration.
Command Definitions
Memory Read CommandMust be a 16-bit OSPI Dual Read Command under Command Definitions0xA000 The command to read in DOPI mode.
Memory Write CommandMust be a 16-bit OSPI Write Command under Command Definitions0x2000 The command to write in DOPI mode.
OM_DQS Enable Counter
DOPIMust be an integer between 0 and 2553 OM_DQS enable counter for memory access. Setting for DOPI mode.
Chip Select Timing Setting
Memory Mapped Read Command Interval
  • 2
  • 5
  • 7
  • 9
  • 11
  • 13
  • 15
  • 17
2 Memory mapped read command execution interval setting in OCTACLK units
Memory Mapped Write Command Interval
  • 2
  • 5
  • 7
  • 9
  • 11
  • 13
  • 15
  • 17
2 Memory mapped write command execution interval setting in OCTACLK units
Command Interval
  • 2
  • 5
  • 7
  • 9
  • 11
  • 13
  • 15
  • 17
2 Command execution interval setting in OCTACLK units
Memory Mapped Read Pull-up Timing
  • 6.5 DOPI
  • 7.5 DOPI
  • 8.5 DOPI
6.5 DOPI Memory mapped read signal pull-up timing setting in OCTACLK units
Memory Mapped Write Pull-up Timing
  • 1.5 DOPI
  • 2.5 DOPI
  • 3.5 DOPI
  • 4.5 DOPI
  • 5.5 DOPI
  • 6.5 DOPI
  • 7.5 DOPI
  • 8.5 DOPI
1.5 DOPI Memory mapped write signal pull-up timing setting in OCTACLK units
Pull-up Timing
  • 6.5 DOPI
  • 7.5 DOPI
  • 8.5 DOPI
6.5 DOPI Signal pull-up timing setting in OCTACLK units
Memory Mapped Read Pull-down Timing
  • 2.5 DOPI
  • 3.5 DOPI
  • 4.5 DOPI
2.5 DOPI Memory mapped read signal pull-down timing setting in OCTACLK units
Memory Mapped Write Pull-down Timing
  • 2.5 DOPI
  • 3.5 DOPI
  • 4.5 DOPI
2.5 DOPI Memory mapped write signal pull-down timing setting in OCTACLK units
Pull-down Timing
  • 2.5 DOPI
  • 3.5 DOPI
  • 4.5 DOPI
2.5 DOPI Signal pull-down timing setting in OCTACLK units
Command Length BytesMust be an integer between 1 and 22 Command length in bytes
Memory Read Dummy CyclesMust be an integer between 3 and 84 Memory read dummy cycles
Memory Write Dummy CyclesMust be an integer between 3 and 84 Memory write dummy cycles
DOPI Byte Order
  • Byte0, Byte1, Byte2, Byte3
  • Byte1, Byte0, Byte3, Byte2
Byte1, Byte0, Byte3, Byte2 Byte order on the external bus
Chip Select Maximum Low Time (us)Must be an integer between 0 to 5114 Chip Select Maximum Low Time (tCSM).

Clock Configuration

PCLKB is the Octal-SPI bus interface, and PCLKA is used to set OSPI registers.

The signals to the OSPI device are derived from OCTASPICLK. The OMSCLK signal is OCTASPICLK / 2. Data can be output at the OCTASPICLK rate if SPI Protocol is set to Dual Data Rate OPI.

The PCLKB, PCLKA, and OCTASPICLK frequencies can be set on the Clocks tab of the RA Configuration editor.

Pin Configuration

The following pins are available to connect to an external OSPI device:

Note
Data pins must be configured with IOPORT_CFG_DRIVE_HS_HIGH.
Chip Select pins should be configured with at least IOPORT_CFG_DRIVE_MEDIUM.

Usage Notes

Usage Notes for OctaFlash support

Enabling DMAC

DMAC data transmission support is configurable for OSPI Flash and is disabled from the build by default. Use of a high-priority (low channel number) DMAC for data transmission is strongly recommended.

For further details on DMAC please refer Transfer (r_dmac).

OSPI Memory Mapped Access

After R_OSPI_Open() completes successfully, the OctaFlash device contents are mapped to address 0x68000000 (channel 0) or 0x70000000 (channel 1) based on the channel configured and can be read like on-chip flash. Channel 0 supports 128 MB while Channel 1 supports 256 MB of address space.

Auto-calibration

Auto-calibration procedure is triggered automatically when the 'Data latching delay' field in the configurator properties is set to 0. The user application is responsible for setting the appropriate preamble pattern before calling R_OSPI_Open() with SOPI/DOPI mode or changing the SPI protocol to SOPI/DOPI using R_OSPI_SpiProtocolSet() API. The appropriate preamble pattern can be written to the desired address using the R_OSPI_Write() API while in the SPI mode (recommended). Ensure that the same address is passed through the configurator. If the OctaFlash chip is already in SOPI/DOPI mode, the preamble pattern must be programmed using the debugger before calling R_OSPI_Open().

Chip Select Latencies

Chip select latencies can be set through the configurator. The default settings support SOPI and SPI at minimum latency. In case the driver is opened in SPI mode and will be switched to DOPI mode later using R_OSPI_SpiProtocolSet(), please select latencies required for DOPI before calling R_OSPI_Open().

OctaFlash Commands

Usage Notes for OctaRAM support

OSPI Memory Mapped Access

After R_OSPI_Open() completes successfully, the OctaRAM device contents are mapped to address 0x68000000 (channel 0) or 0x70000000 (channel 1) based on the channel configured and can be written to or read from like on-chip RAM. Channel 0 and 1 support 8 MB of address space.

Auto-calibration

Since the OctaRAM only supports DOPI mode, the driver allows the user to call R_OSPI_Open() without performing the auto-calibration procedure automatically when 'Data latching delay' field is set to 0 in the configurator properties. This is done so that the user can write the appropriate preamble pattern to the desired address using memory mapped writes while in DOPI mode. Ensure that the same address is passed through the configurator. R_OSPI_AutoCalibrate() should be then called to perform auto-calibration.

Chip Select Latencies

Chip select latencies can be set through the configurator. The default settings support DOPI at minimum latency.

Limitations

Developers should be aware of the following limitations when using the OSPI driver:

OctaFlash

Examples

OSPI Flash:

Basic Example

This is a basic example of minimal use of the OSPI in an application with OctaFlash.

#define OSPI_EXAMPLE_DATA_LENGTH (1024)
uint8_t g_dest[OSPI_EXAMPLE_DATA_LENGTH];
/* Place data in the .ospi_flash section to flash it during programming. */
const uint8_t g_src[OSPI_EXAMPLE_DATA_LENGTH] BSP_PLACE_IN_SECTION(".ospi_flash") = "ABCDEFGHIJKLMNOPQRSTUVWXYZ";
/* Place code in the .code_in_ospi section to flash it during programming. */
void r_ospi_example_function(void) BSP_PLACE_IN_SECTION(".code_in_ospi") __attribute__((noinline));
void r_ospi_example_function (void)
{
/* Add code here. */
}
void r_ospi_basic_example (void)
{
/* Open the OSPI instancee */
fsp_err_t err = R_OSPI_Open(&g_ospi0_ctrl, &g_ospi0_cfg);
assert(FSP_SUCCESS == err);
/* (Optional) Change SPI to DOPI mode */
r_ospi_example_spi_to_dopi();
/* After R_OSPI_Open() and any required device specific intiialization, data can be read directly from the OSPI flash. */
memcpy(&g_dest[0], &g_src[0], OSPI_EXAMPLE_DATA_LENGTH);
/* After R_OSPI_Open() and any required device specific intiialization, functions in the OSPI flash can be called. */
r_ospi_example_function();
}

Reading Status Register Example (R_OSPI_DirectTransfer)

This is an example of using R_OSPI_DirectWrite followed by R_OSPI_DirectRead to send the read status register command and read back the status register from the device.

#define OSPI_COMMAND_READ_STATUS_REGISTER (0x05U)
void r_ospi_direct_example (void)
{
spi_flash_direct_transfer_t ospi_test_direct_transfer =
{
.command = OSPI_TEST_READ_STATUS_COMMAND_SPI_MODE,
.address = 0U,
.data = 0U,
.command_length = 1U,
.address_length = 0U,
.data_length = 0U,
.dummy_cycles = 0U
};
/* Open the OSPI instance. */
fsp_err_t err = R_OSPI_Open(&g_ospi0_ctrl, &g_ospi0_cfg);
assert(FSP_SUCCESS == err);
/* Write Enable */
err = R_OSPI_DirectTransfer(&g_ospi0_ctrl, &ospi_test_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
assert(FSP_SUCCESS == err);
/* Read Status Register */
ospi_test_direct_transfer.command = OSPI_TEST_READ_STATUS_COMMAND_SPI_MODE;
ospi_test_direct_transfer.data_length = 1U;
err = R_OSPI_DirectTransfer(&g_ospi0_ctrl, &ospi_test_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
assert(FSP_SUCCESS == err);
/* Check if Write Enable is set */
if (OSPI_WEN_BIT_MASK != (ospi_test_direct_transfer.data & OSPI_WEN_BIT_MASK))
{
__BKPT(0);
}
}

Auto-calibration Example (R_OSPI_DirectTransfer, R_OSPI_Write, R_OSPI_SpiProtocolSet)

This is an example of using R_OSPI_SpiProtocolSet to change the operating mode from SPI to SOPI and allow the driver to initiate auto-calibration.

#define OSPI_DOPI_PREAMBLE_PATTERN_LENGTH_BYTES (16U)
#define OSPI_EXAMPLE_PREAMBLE_ADDRESS (0x68000000U) /* Device connected to CS0 */
const uint8_t g_preamble_bytes[OSPI_DOPI_PREAMBLE_PATTERN_LENGTH_BYTES] =
{
0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x08, 0x00, 0x00, 0xF7, 0xFF, 0x00, 0x08, 0xF7, 0x00, 0xF7
};
void ospi_example_wait_until_wip (void)
{
fsp_err_t err = FSP_SUCCESS;
spi_flash_status_t status;
status.write_in_progress = true;
uint32_t timeout = UINT32_MAX;
while ((status.write_in_progress) && (--timeout))
{
err = R_OSPI_StatusGet(&g_ospi0_ctrl, &status);
assert(FSP_SUCCESS == err);
}
if (0 == timeout)
{
assert(FSP_SUCCESS == err);
}
}
void r_ospi_auto_calibrate_example (void)
{
/* Open the OSPI instance. */
/* Set data_latch_delay_clocks to 0x0 to enable auto-calibration */
fsp_err_t err = R_OSPI_Open(&g_ospi0_ctrl, &g_ospi0_cfg);
assert(FSP_SUCCESS == err);
uint8_t * preamble_pattern_addr = (uint8_t *) OSPI_EXAMPLE_PREAMBLE_ADDRESS;
err = R_OSPI_Write(&g_ospi0_ctrl, g_preamble_bytes, preamble_pattern_addr, OSPI_EXAMPLE_PREAMBLE_ADDRESS);
assert(FSP_SUCCESS == err);
/* Wait until write has been completed */
ospi_example_wait_until_wip();
/* Change from SPI to DOPI mode */
r_ospi_example_spi_to_dopi();
}

Octaclk Update Example (R_OSPI_SpiProtocolSet)

This is an example of using R_BSP_OctaclkUpdate to change the Octal-SPI clock frequency during run time. The OCTACLK frequency must be updated before calling the R_OSPI_SpiProtocolSet with appropriate clock source and divider settings required to be set for the new SPI protocol mode. Ensure that the clock source selected is started.

static void ospi_example_change_omclk (void)
{
/* Ensure clock source (PLL2 in this example) is running before changing the OCTACLK frequency */
bsp_octaclk_settings_t octaclk_settings;
octaclk_settings.source_clock = BSP_CLOCKS_CLOCK_PLL2;
octaclk_settings.divider = BSP_CLOCKS_OCTACLK_DIV_2;
R_BSP_OctaclkUpdate(&octaclk_settings);
}

OSPI Data and IAR

When using the IAR compiler, OSPI data must be const qualified to be downloaded by the debugger.

OSPI RAM:

Basic Example

This is a basic example of minimal use of the OSPI in an application with OctaRAM.

#define OSPI_RAM_EXAMPLE_DATA_LENGTH (1024)
uint8_t g_dest[OSPI_RAM_EXAMPLE_DATA_LENGTH];
/* Place uninitialized data buffers in the ospi_device_0_no_load section.
* Use ospi_device_1_no_load section if the OctaRAM is configured on channel 1.
*/
uint8_t g_src_1[OSPI_RAM_EXAMPLE_DATA_LENGTH] BSP_PLACE_IN_SECTION(".ospi_device_0_no_load");
uint8_t g_src_2[OSPI_RAM_EXAMPLE_DATA_LENGTH] BSP_PLACE_IN_SECTION(".ospi_device_0_no_load");
void r_ospi_ram_basic_example (void)
{
/* Open the OSPI instancee.
* Ensure valid setting of the 'Data latching delay' field in the configurator.
* To successfully perform OSPI RAM reads this value must not be 0.
*/
fsp_err_t err = R_OSPI_Open(&g_ospi_ram0_ctrl, &g_ospi_ram0_cfg);
assert(FSP_SUCCESS == err);
/* After R_OSPI_Open() and any required device specific intiialization, data can be read from or written to directly from the OSPI RAM. */
memcpy(&g_dest[0], &g_src_1[0], OSPI_RAM_EXAMPLE_DATA_LENGTH);
memcpy(&g_src_2[0], &g_src_1[0], OSPI_RAM_EXAMPLE_DATA_LENGTH);
}

Auto-calibration Example (R_OSPI_DirectTransfer, R_OSPI_AutoCalibrate)

This is an example of using R_OSPI_AutoCalibrate to calibrate OSPI peripheral to read data from the OctaRAM device.

#define OSPI_RAM_EXAMPLE_PREAMBLE_ADDRESS (0x68000000U) /* Device connected to CS0 */
#define OSPI_RAM_EXAMPLE_OCTARAM_CR_LATENCY_COUNTER_MASK (0x00F0U)
#define OSPI_RAM_EXAMPLE_OCTARAM_CR_LATENCY_COUNTER_POS (4U)
#define OSPI_RAM_EXAMPLE_OCTARAM_100MHZ_4CLOCKS_CR_SETTING (1U)
void r_ospi_ram_auto_calibrate_example (void)
{
/* Open the OSPI instancee */
fsp_err_t err = R_OSPI_Open(&g_ospi_ram0_ctrl, &g_ospi_ram0_cfg);
assert(FSP_SUCCESS == err);
/* OctaRAM Configuration Register (cr) read and write command definition */
spi_flash_direct_transfer_t read_cr =
{
.command = 0xC000U, // NOLINT(readability-magic-numbers)
.address = 0x00040000U, // NOLINT(readability-magic-numbers)
.data = 0U,
.command_length = 2U,
.address_length = 4U,
.data_length = 2U,
/* Dummy Cycles set to the default value specified in the OctaRAM device Configuration Register */
.dummy_cycles = 5U
};
spi_flash_direct_transfer_t write_cr =
{
.command = 0x4000U, // NOLINT(readability-magic-numbers)
.address = 0x00040000U, // NOLINT(readability-magic-numbers)
.data = 0U,
.command_length = 2U,
.address_length = 4U,
.data_length = 2U,
.dummy_cycles = 0U
};
/* Read OctaRAM device Configuration Register */
err = R_OSPI_DirectTransfer(&g_ospi_ram0_ctrl, &read_cr, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
assert(FSP_SUCCESS == err);
uint16_t config_reg = (uint16_t) (((uint16_t) (read_cr.data) & ~OSPI_RAM_EXAMPLE_OCTARAM_CR_LATENCY_COUNTER_MASK) |
((uint16_t) (OSPI_RAM_EXAMPLE_OCTARAM_100MHZ_4CLOCKS_CR_SETTING <<
OSPI_RAM_EXAMPLE_OCTARAM_CR_LATENCY_COUNTER_POS) &
OSPI_RAM_EXAMPLE_OCTARAM_CR_LATENCY_COUNTER_MASK));
/* Write Configuration Register */
write_cr.data = (uint32_t) config_reg;
err = R_OSPI_DirectTransfer(&g_ospi_ram0_ctrl, &write_cr, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
assert(FSP_SUCCESS == err);
read_cr.data = 0;
/* Set Dummy Clocks to value configured above (4 Clocks) */
read_cr.dummy_cycles = 4U;
/* Read Configuration Register */
err = R_OSPI_DirectTransfer(&g_ospi_ram0_ctrl, &read_cr, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
assert(FSP_SUCCESS == err);
/* Confirm the intended Configuration Register value */
assert(config_reg == (uint16_t) (read_cr.data & UINT16_MAX));
volatile uint32_t * ram_addr = (uint32_t *) OSPI_RAM_EXAMPLE_PREAMBLE_ADDRESS;
/* Write the auto-calibration preamble pattern for DOPI mode as specified by the Hardware Manual */
ram_addr[0] = 0xFFFF0000; // NOLINT(readability-magic-numbers)
ram_addr[1] = 0x0800FF00; // NOLINT(readability-magic-numbers)
ram_addr[2] = 0xFF0000F7; // NOLINT(readability-magic-numbers)
ram_addr[3] = 0x00F708F7; // NOLINT(readability-magic-numbers)
err = R_OSPI_AutoCalibrate(&g_ospi_ram0_ctrl);
assert(FSP_SUCCESS == err);
/* After Auto-calibration data can be read from or written to directly from the OSPI RAM. */
memcpy(&g_dest[0], &g_src_1[0], OSPI_RAM_EXAMPLE_DATA_LENGTH);
memcpy(&g_src_2[0], &g_src_1[0], OSPI_RAM_EXAMPLE_DATA_LENGTH);
}

Data Structures

struct  ospi_instance_ctrl_t
 

Enumerations

enum  ospi_device_number_t
 
enum  ospi_device_type_t
 
enum  ospi_command_cs_pullup_clocks_t
 
enum  ospi_command_cs_pulldown_clocks_t
 
enum  ospi_dopi_byte_order_t
 

Data Structure Documentation

◆ ospi_instance_ctrl_t

struct ospi_instance_ctrl_t

Instance control block. DO NOT INITIALIZE. Initialization occurs when spi_flash_api_t::open is called

Enumeration Type Documentation

◆ ospi_device_number_t

enum ospi_device_number_t
Enumerator
OSPI_DEVICE_NUMBER_0 

Device connected to Chip-Select 0.

OSPI_DEVICE_NUMBER_1 

Device connected to Chip-Select 1.

◆ ospi_device_type_t

enum ospi_device_type_t
Enumerator
OSPI_DEVICE_FLASH 

Device Memory type OctaFlash.

OSPI_DEVICE_RAM 

Device Memory type OctaRAM.

◆ ospi_command_cs_pullup_clocks_t

enum ospi_command_cs_pullup_clocks_t
Enumerator
OSPI_COMMAND_CS_PULLUP_CLOCKS_2 

1.5 clocks DOPI mode; 2 Clocks all other modes; Unsupported for DOPI Read

OSPI_COMMAND_CS_PULLUP_CLOCKS_3 

2.5 clocks DOPI mode; 3 Clocks all other modes; Unsupported for DOPI Read

OSPI_COMMAND_CS_PULLUP_CLOCKS_4 

3.5 clocks DOPI mode; 4 Clocks all other modes; Unsupported for DOPI Read

OSPI_COMMAND_CS_PULLUP_CLOCKS_5 

4.5 clocks DOPI mode; 5 Clocks all other modes; Unsupported for DOPI Read

OSPI_COMMAND_CS_PULLUP_CLOCKS_6 

5.5 clocks DOPI mode; 6 Clocks all other modes; Unsupported for DOPI Read

OSPI_COMMAND_CS_PULLUP_CLOCKS_7 

6.5 clocks DOPI mode; 7 Clocks all other modes

OSPI_COMMAND_CS_PULLUP_CLOCKS_8 

7.5 clocks DOPI mode; 8 Clocks all other modes

OSPI_COMMAND_CS_PULLUP_CLOCKS_9 

8.5 clocks DOPI mode; 9 Clocks all other modes

◆ ospi_command_cs_pulldown_clocks_t

enum ospi_command_cs_pulldown_clocks_t
Enumerator
OSPI_COMMAND_CS_PULLDOWN_CLOCKS_3 

2.5 clocks DOPI mode; 3 Clocks all other modes

OSPI_COMMAND_CS_PULLDOWN_CLOCKS_4 

3.5 clocks DOPI mode; 4 Clocks all other modes

OSPI_COMMAND_CS_PULLDOWN_CLOCKS_5 

4.5 clocks DOPI mode; 5 Clocks all other modes

◆ ospi_dopi_byte_order_t

enum ospi_dopi_byte_order_t
Enumerator
OSPI_DOPI_BYTE_ORDER_0123 

DOPI byte order byte 0, byte 1, byte 2, byte 3.

OSPI_DOPI_BYTE_ORDER_1032 

DOPI byte order byte 1, byte 0, byte 3, byte 2.

Function Documentation

◆ R_OSPI_Open()

fsp_err_t R_OSPI_Open ( spi_flash_ctrl_t *const  p_ctrl,
spi_flash_cfg_t const *const  p_cfg 
)

Open the OSPI driver module. After the driver is open, the OSPI can be accessed like internal flash memory.

Implements spi_flash_api_t::open.

Example:

/* Open the OSPI instancee */
fsp_err_t err = R_OSPI_Open(&g_ospi0_ctrl, &g_ospi0_cfg);
Return values
FSP_SUCCESSConfiguration was successful.
FSP_ERR_ASSERTIONThe parameter p_ctrl or p_cfg is NULL.
FSP_ERR_ALREADY_OPENDriver has already been opened with the same p_ctrl.
FSP_ERR_CALIBRATE_FAILEDFailed to perform auto-calibrate.
FSP_ERR_INVALID_ARGUMENTAttempting to open the driver with an invalid SPI protocol for OctaRAM.

◆ R_OSPI_DirectWrite()

fsp_err_t R_OSPI_DirectWrite ( spi_flash_ctrl_t *const  p_ctrl,
uint8_t const *const  p_src,
uint32_t const  bytes,
bool const  read_after_write 
)

Writes raw data directly to the OctaFlash. API not supported. Use R_OSPI_DirectTransfer

Implements spi_flash_api_t::directWrite.

Return values
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI.

◆ R_OSPI_DirectRead()

fsp_err_t R_OSPI_DirectRead ( spi_flash_ctrl_t *const  p_ctrl,
uint8_t *const  p_dest,
uint32_t const  bytes 
)

Reads raw data directly from the OctaFlash. API not supported. Use R_OSPI_DirectTransfer.

Implements spi_flash_api_t::directRead.

Return values
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI.

◆ R_OSPI_DirectTransfer()

fsp_err_t R_OSPI_DirectTransfer ( spi_flash_ctrl_t *const  p_ctrl,
spi_flash_direct_transfer_t *const  p_transfer,
spi_flash_direct_transfer_dir_t  direction 
)

Read/Write raw data directly with the OctaFlash/OctaRAM device.

Implements spi_flash_api_t::directTransfer.

Example:

/* Write Enable */
err = R_OSPI_DirectTransfer(&g_ospi0_ctrl, &ospi_test_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
assert(FSP_SUCCESS == err);
Return values
FSP_SUCCESSThe flash was programmed successfully.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENDriver is not opened.

◆ R_OSPI_XipEnter()

fsp_err_t R_OSPI_XipEnter ( spi_flash_ctrl_t *const  p_ctrl)

Enters Single Continuous Read/Write mode.

Implements spi_flash_api_t::xipEnter.

Return values
FSP_SUCCESSThe flash was programmed successfully.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI - OctaRAM.

◆ R_OSPI_XipExit()

fsp_err_t R_OSPI_XipExit ( spi_flash_ctrl_t *const  p_ctrl)

Exits XIP (execute in place) mode.

Implements spi_flash_api_t::xipExit.

Return values
FSP_SUCCESSThe flash was programmed successfully.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI - OctaRAM.

◆ R_OSPI_Write()

fsp_err_t R_OSPI_Write ( spi_flash_ctrl_t *const  p_ctrl,
uint8_t const *const  p_src,
uint8_t *const  p_dest,
uint32_t  byte_count 
)

Program a page of data to the flash.

Implements spi_flash_api_t::write.

Example:

err = R_OSPI_Write(&g_ospi0_ctrl, g_preamble_bytes, preamble_pattern_addr, OSPI_EXAMPLE_PREAMBLE_ADDRESS);
assert(FSP_SUCCESS == err);
Return values
FSP_SUCCESSThe flash was programmed successfully.
FSP_ERR_ASSERTIONp_instance_ctrl, p_dest or p_src is NULL, or byte_count crosses a page boundary.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_DEVICE_BUSYAnother Write/Erase transaction is in progress.
FSP_ERR_INVALID_SIZEWrite operation crosses page-boundary.
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI - OctaRAM.
FSP_ERR_WRITE_FAILEDThe write enable bit was not set.

◆ R_OSPI_Erase()

fsp_err_t R_OSPI_Erase ( spi_flash_ctrl_t *const  p_ctrl,
uint8_t *const  p_device_address,
uint32_t  byte_count 
)

Erase a block or sector of flash. The byte_count must exactly match one of the erase sizes defined in spi_flash_cfg_t. For chip erase, byte_count must be SPI_FLASH_ERASE_SIZE_CHIP_ERASE.

Implements spi_flash_api_t::erase.

Return values
FSP_SUCCESSThe command to erase the flash was executed successfully.
FSP_ERR_ASSERTIONp_instance_ctrl or p_device_address is NULL, byte_count doesn't match an erase size defined in spi_flash_cfg_t, or byte_count is set to 0.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_DEVICE_BUSYThe device is busy.
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI - OctaRAM.
FSP_ERR_WRITE_FAILEDThe write enable bit was not set.

◆ R_OSPI_StatusGet()

fsp_err_t R_OSPI_StatusGet ( spi_flash_ctrl_t *const  p_ctrl,
spi_flash_status_t *const  p_status 
)

Gets the write or erase status of the flash.

Implements spi_flash_api_t::statusGet.

Example:

err = R_OSPI_StatusGet(&g_ospi0_ctrl, &status);
assert(FSP_SUCCESS == err);
Return values
FSP_SUCCESSThe write status is in p_status.
FSP_ERR_ASSERTIONp_instance_ctrl or p_status is NULL.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI - OctaRAM.

◆ R_OSPI_BankSet()

fsp_err_t R_OSPI_BankSet ( spi_flash_ctrl_t *const  p_ctrl,
uint32_t  bank 
)

Selects the bank to access.

Implements spi_flash_api_t::bankSet.

Return values
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI.

◆ R_OSPI_SpiProtocolSet()

fsp_err_t R_OSPI_SpiProtocolSet ( spi_flash_ctrl_t *const  p_ctrl,
spi_flash_protocol_t  spi_protocol 
)

Sets the SPI protocol.

Implements spi_flash_api_t::spiProtocolSet.

Return values
FSP_SUCCESSSPI protocol updated on MCU peripheral.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_CALIBRATE_FAILEDFailed to perform auto-calibrate.
FSP_ERR_INVALID_ARGUMENTAttempting to set an invalid SPI protocol for OctaRAM.

◆ R_OSPI_AutoCalibrate()

fsp_err_t R_OSPI_AutoCalibrate ( spi_flash_ctrl_t *const  p_ctrl)

Auto-calibrate the OctaRAM device using the preamble pattern.

Note
The preamble pattern must be written to the configured address before calling this API. Implements spi_flash_api_t::autoCalibrate.
Return values
FSP_SUCCESSSPI protocol updated on MCU peripheral.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENDriver is not opened.
FSP_ERR_CALIBRATE_FAILEDFailed to perform auto-calibrate.
FSP_ERR_UNSUPPORTEDAPI not supported by OSPI - OctaFlash.

◆ R_OSPI_Close()

fsp_err_t R_OSPI_Close ( spi_flash_ctrl_t *const  p_ctrl)

Close the OSPI driver module.

Implements spi_flash_api_t::close.

Return values
FSP_SUCCESSConfiguration was successful.
FSP_ERR_ASSERTIONp_instance_ctrl is NULL.
FSP_ERR_NOT_OPENDriver is not opened.