Functions
fsp_err_t	R_SLCDC_Open (slcdc_ctrl_t const p_ctrl, slcdc_cfg_t const const p_cfg)

fsp_err_t	R_SLCDC_Write (slcdc_ctrl_t const p_ctrl, uint8_t const start_segment, uint8_t const p_data, uint8_t const segment_count)

fsp_err_t	R_SLCDC_Modify (slcdc_ctrl_t *const p_ctrl, uint8_t const segment, uint8_t const data, uint8_t const data_mask)

fsp_err_t	R_SLCDC_Start (slcdc_ctrl_t *const p_ctrl)

fsp_err_t	R_SLCDC_Stop (slcdc_ctrl_t *const p_ctrl)

fsp_err_t	R_SLCDC_SetContrast (slcdc_ctrl_t *const p_ctrl, slcdc_contrast_t const contrast)

fsp_err_t	R_SLCDC_SetDisplayArea (slcdc_ctrl_t *const p_ctrl, slcdc_display_area_t const display_area)

fsp_err_t	R_SLCDC_Close (slcdc_ctrl_t *const p_ctrl)

Detailed Description

Driver for the SLCDC peripheral on RA MCUs. This module implements the SLCDC Interface.

Overview

The segment LCD controller (SLCDC) utilizes two to four reference voltages to provide AC signals for driving traditional segment LCD panels. Depending on the LCD and MCU package, up to 272 segments can be driven. A built-in link to the RTC allows for up to 152 segments to switch between two patterns at regular intervals. An on-chip boost driver can be used to provide configurable reference voltages up to 5.25V allowing for simple contrast adjustment.

Features

The SLCDC module can perform the following functions:

Initialize, start and stop the SLCDC
Set and modify the output pattern
Blink between two patterns based on a periodic RTC interrupt signal
Adjust display contrast (only when using internal voltage boosting)
Select reference voltage mode: VL1 reference mode (1/3 or 1/4 Bias) and VL2 reference mode (1/3 Bias) can be selected at internal voltage boosting method, conventional VCC reference mode (1/3 Bias) and VL4 reference mode (1/3) Bias can be selected at capacitor split method

Configuration

Build Time Configurations for r_slcdc

The following build time configurations are defined in fsp_cfg/r_slcdc_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.

Configurations for Graphics > Segment LCD (r_slcdc)

This module can be added to the Stacks tab via New Stack > Graphics > Segment LCD (r_slcdc).

Configuration	Options	Default	Description
General
Name	Name must be a valid C symbol	g_slcdc0	Module Name
Clock
Source	MCU Specific Options		Select the clock source.
Divisor	MCU Specific Options		Select the clock divisor.
Output
Bias method	1/2 bias 1/3 bias 1/4 bias	1/2 bias	Select the bias method. This determines the number of voltage levels used to create the waveforms.
Timeslice	MCU Specific Options		Select the LCD time slice. The number of slices should match the number of common (COM) pins for your LCD panel.
Waveform	Waveform A Waveform B	Waveform A	Select the LCD waveform.
Drive method	External resistance division Internal voltage boosting Capacitor split	External resistance division	Select the LCD drive method.
Reference Voltage	MCU Specific Options		Select the LCD reference voltage.
Default contrast (if available)	MCU Specific Options		Select the default contrast level.

Valid Configurations

Though there are many setting combinations only a limited subset are supported by the SLCDC peripheral hardware:

Boards have feature Select reference voltage mode (see User's Manual (r01uh1005ej0050) for details)

Waveform	Slices	Bias	External Resistance	Internal boosting VL1	Internal boosting VL2	Capacitor split VCC	Capacitor split VL4
A	8	1/4	Available	Available	—	—	—
A	6	1/4	—	Available	—	—	—
A	8	1/3	Available	Available	Available	Available	Available
A	6	1/3	Available	Available	Available	Available	Available
A	4	1/3	Available	Available	Available	Available	Available
A	3	1/3	Available	Available	Available	Available	Available
A	3	1/2	Available	—	—	—	—
A	2	1/2	Available	—	—	—	—
A	Static	—	Available	—	—	—	—
B	8	1/4	Available	Available	—	—	—
B	8	1/3	Available	Available	Available	Available	Available
B	6	1/3	Available	Available	Available	Available	Available
B	4	1/3	Available	Available	Available	Available	Available
B	3	1/3	Available	Available	Available	Available	Available

Others:

Waveform	Slices	Bias	External Resistance	Internal Boost	Capacitor Split
A	8	1/4	Available	Available	—
A	4	1/3	Available	Available	Available
A	3	1/3	Available	Available	Available
A	3	1/2	Available	—	—
A	2	1/2	Available	—	—
A	Static	—	Available	—	—
B	8	1/4	Available	Available	Available
B	4	1/3	Available	Available	—

Clock Configuration

User's Manual (r01uh1005ej0050): The SLCDC clock can be sourced from the main clock (MOSC), sub-clock (SOSC), HOCO, LOCO or MOCO. Dividers of 4 to 1024 are available for SOSC/LOCO and 256 to 1048576 are for MOSC/HOCO/MOCO. It is recommended to adjust the divisor such that the resulting clock provides a frame frequency of 32-128 Hz (some conditions have a frame frequency 24 to 128 Hz - see Table 36.10 in the User's Manual (r01uh1005ej0050) for details).

Others: The SLCDC clock can be sourced from the main clock (MOSC), sub-clock (SOSC), HOCO or LOCO. Dividers of 4 to 1024 are available for SOSC/LOCO and 256 to 524288 for MOSC/HOCO. It is recommended to adjust the divisor such that the resulting clock provides a frame frequency of 32-128 Hz.

Note: Make sure your desired source clock is enabled and running before starting SLCDC output.; Do not set the segment LCD clock over 512 Hz when using internal boost or capacitor split modes.

Pin Configuration

This module controls a variety of pins necessary for segment LCD voltage generation and signal output:

Pin Name	Function	Notes
SEGn	Segment data output	Connect these signals to the segment pins of the LCD.
COMn	Common signal output	Connect these signals to the common pins of the LCD.
VLn	Voltage reference	These pins should be connected to passive components based on the selected drive method (see section 45.7 "Supplying LCD Drive Voltages VL1, VL2, VL3, and VL4" in the RA4M1 User's Manual (R01UH0887EJ0100)).
CAPH, CAPL	Drive voltage generator capacitor	Connect a nonpolar 0.47uF capacitor across these pins when using internal boost or capacitor split modes. This pin is not needed when using resistance division.

Interrupt Configuration

The SLCDC provides no interrupt signals.

Note: Blinking output timing is driven directly from the RTC periodic interrupt. Once the interrupt is enabled setting the display to SLCDC_DISP_BLINK will swap between A- and B-pattern each time it occurs. The ELC is not required for this functionality.

Usage Notes

Limitations

Developers should be aware of the following limitations when using the SLCDC:

Different packages provide different numbers of segment pins. Check the User's Manual for your device to confirm availability and mapping of segment signals.
When using internal boost mode a delay of 5ms is required between calling R_SLCDC_Open and R_SLCDC_Start to allow the boost circuit to charge.
When using the internal boost or capacitor split method do not set the segment LCD clock higher than 512 Hz.

Examples

Basic Example

Below is a basic example of minimal use of the SLCDC in an application. The SLCDC driver is initialized, output is started and a pattern is written to the segment registers.

void slcdc_init (void)
{
    fsp_err_t err;
    /* Open SLCDC driver */
    err = R_SLCDC_Open(&g_slcdc_ctrl, &g_slcdc_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* When using internal boost mode this delay is required to allow the boost circuit to charge. See RA4M1 User's
     * Manual (R01UH0887EJ0100) 8.2.18 "Segment LCD Source Clock Control Register (SLCDSCKCR)" for details. */
    R_BSP_SoftwareDelay(5, BSP_DELAY_UNITS_MILLISECONDS);
    /* Start SLCDC output */
    err = R_SLCDC_Start(&g_slcdc_ctrl);
    assert(FSP_SUCCESS == err);
    /* Write pattern to display */
    err = R_SLCDC_Write(&g_slcdc_ctrl, 0, segment_data, NUM_SEGMENTS);
    assert(FSP_SUCCESS == err);
}

Note: While the SLCDC is running, pattern data is constantly being output. No latching or buffering is required when writing or reading segment data.

Blinking Output

This example demonstrates how to set up blinking output using the RTC periodic interrupt. In this example it is assumed that the SLCDC has already been started.

void slcdc_blink (void)
{
    fsp_err_t err;
    /* Open RTC and set time/date */
    err = R_RTC_Open(&r_rtc_ctrl, &r_rtc_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    err = R_RTC_CalendarTimeSet(&r_rtc_ctrl, &g_rtc_time);
    assert(FSP_SUCCESS == err);
    /* Set RTC periodic interrupt to 2 Hz (display blink cycle will be 1 Hz) */
    err = R_RTC_PeriodicIrqRateSet(&r_rtc_ctrl, RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_2_SECOND);
    assert(FSP_SUCCESS == err);
    /* Set display to blink */
    err = R_SLCDC_SetDisplayArea(&g_slcdc_ctrl, SLCDC_DISP_BLINK);
    assert(FSP_SUCCESS == err);
    /* Display will now continuously blink */
}

Data Structures
struct	slcdc_instance_ctrl_t

Data Structure Documentation

◆ slcdc_instance_ctrl_t

struct slcdc_instance_ctrl_t

SLCDC control block. DO NOT INITIALIZE. Initialization occurs when slcdc_api_t::open is called

Function Documentation

◆ R_SLCDC_Open()

fsp_err_t R_SLCDC_Open	(	slcdc_ctrl_t *const	p_ctrl,
		slcdc_cfg_t const *const	p_cfg
	)

Opens the SLCDC driver. Implements slcdc_api_t::open.

Return values

FSP_SUCCESS	Device was opened successfully.
FSP_ERR_ASSERTION	Pointer to the control block or the configuration structure is NULL.
FSP_ERR_ALREADY_OPEN	Module is already open.
FSP_ERR_UNSUPPORTED	Invalid display mode.

◆ R_SLCDC_Write()

fsp_err_t R_SLCDC_Write	(	slcdc_ctrl_t *const	p_ctrl,
		uint8_t const	start_segment,
		uint8_t const *	p_data,
		uint8_t const	segment_count
	)

Writes a sequence of display data to the segment data registers. Implements slcdc_api_t::write.

Return values

FSP_SUCCESS	Data was written successfully.
FSP_ERR_ASSERTION	Pointer to the control block or data is NULL.
FSP_ERR_INVALID_ARGUMENT	Segment index is (or will be) out of range.
FSP_ERR_NOT_OPEN	Device is not opened or initialized.

◆ R_SLCDC_Modify()

fsp_err_t R_SLCDC_Modify	(	slcdc_ctrl_t *const	p_ctrl,
		uint8_t const	segment,
		uint8_t const	data,
		uint8_t const	data_mask
	)

Modifies a single segment register based on a mask and the desired data. Implements slcdc_api_t::modify.

Return values

FSP_SUCCESS	Device was opened successfully.
FSP_ERR_ASSERTION	Pointer to the control block structure is NULL.
FSP_ERR_INVALID_ARGUMENT	Invalid parameter in the argument.
FSP_ERR_NOT_OPEN	Device is not opened or initialized

◆ R_SLCDC_Start()

fsp_err_t R_SLCDC_Start ( slcdc_ctrl_t *const p_ctrl )

Starts output of LCD signals. Implements slcdc_api_t::start.

Return values

FSP_SUCCESS	SLCDC timing, output, and voltage generation(if configured) activated
FSP_ERR_ASSERTION	Pointer to the control block structure is NULL.
FSP_ERR_NOT_OPEN	Device is not opened or initialized

◆ R_SLCDC_Stop()

fsp_err_t R_SLCDC_Stop ( slcdc_ctrl_t *const p_ctrl )

Stops output of LCD signals. Implements slcdc_api_t::stop.

Return values

FSP_SUCCESS	Device was opened successfully.
FSP_ERR_ASSERTION	Pointer to the control block structure is NULL.
FSP_ERR_NOT_OPEN	Device is not opened or initialized

◆ R_SLCDC_SetContrast()

fsp_err_t R_SLCDC_SetContrast	(	slcdc_ctrl_t *const	p_ctrl,
		slcdc_contrast_t const	contrast
	)

Sets contrast to the specified level. Implements slcdc_api_t::setContrast.

Note: Contrast can be adjusted when the SLCDC is operating in internal boost mode only. The range of values is 0-5 when 1/4 bias setting is used and 0-15 otherwise. See RA4M1 User's Manual (R01UH0887EJ0100) section 45.2.4 "LCD Boost Level Control Register (VLCD)" for voltage levels at each setting.

Return values

FSP_SUCCESS	Device was opened successfully.
FSP_ERR_ASSERTION	Pointer to the control block structure is NULL.
FSP_ERR_NOT_OPEN	Device is not opened or initialized
FSP_ERR_UNSUPPORTED	Unsupported operation

◆ R_SLCDC_SetDisplayArea()

fsp_err_t R_SLCDC_SetDisplayArea	(	slcdc_ctrl_t *const	p_ctrl,
		slcdc_display_area_t const	display_area
	)

Sets output to Waveform A, Waveform B or blinking output. Implements slcdc_api_t::setDisplayArea.

Return values

FSP_SUCCESS	Device was opened successfully.
FSP_ERR_ASSERTION	Pointer to the control block structure is NULL.
FSP_ERR_UNSUPPORTED	Pattern selection has no effect in 8-time-slice mode.
FSP_ERR_NOT_OPEN	Device is not opened or initialized.

◆ R_SLCDC_Close()

fsp_err_t R_SLCDC_Close ( slcdc_ctrl_t *const p_ctrl )

Closes the SLCDC driver. Implements slcdc_api_t::close.

Return values

FSP_SUCCESS	Device was closed successfully.
FSP_ERR_ASSERTION	Pointer to the control block structure is NULL.
FSP_ERR_NOT_OPEN	Device is not opened or initialized

Functions

Detailed Description

Overview

Features

Configuration

Build Time Configurations for r_slcdc

Configurations for Graphics > Segment LCD (r_slcdc)

Valid Configurations

Clock Configuration

Pin Configuration

Interrupt Configuration

Usage Notes

Limitations

Examples

Basic Example

Blinking Output

Data Structures

Data Structure Documentation

◆ slcdc_instance_ctrl_t

Function Documentation

◆ R_SLCDC_Open()

◆ R_SLCDC_Write()

◆ R_SLCDC_Modify()

◆ R_SLCDC_Start()

◆ R_SLCDC_Stop()

◆ R_SLCDC_SetContrast()

◆ R_SLCDC_SetDisplayArea()

◆ R_SLCDC_Close()