Compare Match Timer W (r_cmtw)

Functions
fsp_err_t	R_CMTW_Open (timer_ctrl_t *const p_ctrl, timer_cfg_t const *const p_cfg)
fsp_err_t	R_CMTW_Stop (timer_ctrl_t *const p_ctrl)
fsp_err_t	R_CMTW_Start (timer_ctrl_t *const p_ctrl)
fsp_err_t	R_CMTW_Reset (timer_ctrl_t *const p_ctrl)
fsp_err_t	R_CMTW_Enable (timer_ctrl_t *const p_ctrl)
fsp_err_t	R_CMTW_Disable (timer_ctrl_t *const p_ctrl)
fsp_err_t	R_CMTW_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)
fsp_err_t	R_CMTW_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)
fsp_err_t	R_CMTW_InfoGet (timer_ctrl_t *const p_ctrl, timer_info_t *const p_info)
fsp_err_t	R_CMTW_StatusGet (timer_ctrl_t *const p_ctrl, timer_status_t *const p_status)
fsp_err_t	R_CMTW_OutputEnable (timer_ctrl_t *const p_ctrl, cmtw_io_pin_t pin)
fsp_err_t	R_CMTW_OutputDisable (timer_ctrl_t *const p_ctrl, cmtw_io_pin_t pin)
fsp_err_t	R_CMTW_CallbackSet (timer_ctrl_t *const p_ctrl, void(*p_callback)(timer_callback_args_t *), void *const p_context, timer_callback_args_t *const p_callback_memory)
fsp_err_t	R_CMTW_Close (timer_ctrl_t *const p_ctrl)
fsp_err_t	R_CMTW_CompareMatchSet (timer_ctrl_t *const p_ctrl, uint32_t const compare_match_value, timer_compare_match_t const match_channel)

Detailed Description

Driver for the CMTW peripherals on RX MCUs. This module implements the Timer Interface.

Overview

The Compare Match Timer W (CMTW) module can be used to count events, measure external input signals, generate a periodic interrupt, and output a periodic to a TOC pin. This module supports two units (unit 0 and unit 1) with one channel of 32-bit.

Features

The CMTW module has the following features:

• Supports periodic mode, one-shot mode.
• Supports count source of PCLK
• Signal can be output to a pin.
• Configurable period (counts per timer cycle).
• Supports runtime reconfiguration of period.
• APIs are provided to start, stop, and reset the counter.
• APIs are provided to get the current period, source clock frequency, counting direction.
• APIs are provided to get the current timer status and counter value.
• Supports linking to the specified module, CMTW0 count start, event count, or count restart by ELC events.

Selecting a Timer

RX MCUs have two timer peripherals: the General PWM Timer (GPT), the Compare Match Timer (CMT) and the Compare Match Timer W (CMTW). When selecting between them, consider these factors:

	GPT	CMT	CMTW	TMR
Low Power Modes	The GPT can operate in sleep mode.	The CMT can operate in sleep mode.	The CMTW can operate in sleep mode.	The TMR can operate in sleep mode.
Available Channels	The number of GPT channels is device specific. All currently supported MCUs have at least 4 GPT channels.	All MCUs have 4 CMT channels.	All MCUs have 2 CMTW channels.	The number of TMR channels is device specific. All currently supported MCUs have at least 4 TMR channels.
Timer Resolution	All MCUs have at least one 32-bit GPT timer.	The CMT timers are 16-bit timers.	The CMTWs timers are 32-bit timers.	The TMR timers are 8-bit timers or 16-bit timers.
Clock Source	The GPT runs off PCLKD with a configurable divider up to 1024. It can also be configured to count ELC events or external pulses.	The CMT runs off PCLKB.	The CMTW runs off PCLKB.	The TMR runs off PCLKB.

Configuration

Build Time Configurations for r_cmtw

The following build time configurations are defined in fsp_cfg/r_cmtw_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.

Configurations for Timers > Timer, Compare Match Timer W (r_cmtw)

This module can be added to the Stacks tab via New Stack > Timers > Timer, Compare Match Timer W (r_cmtw).

Configuration	Options	Default	Description
General > Name	Name must be a valid C symbol	g_timer0	Module name.
General > Channel	Value must be a non-negative integer	0	Specify the hardware channel.
General > Mode	Periodic One-Shot	Periodic	Mode selection. Note: One-shot mode is implemented in software. ISR's must be enabled for one shot even if callback is unused.
General > Period	Value must be non-negative	0x10000	Specify the timer period based on the selected unit.
General > Period Unit	Raw Counts Nanoseconds Microseconds Milliseconds Seconds Hertz Kilohertz	Raw Counts	Unit of the period specified above
General > Counter Size	32-bit 16-bit	32-bit	Size of the timer counter
General > Counter Clear Source	Compare Match Disabled Input Capture0 Input Capture1 Output Compare0 Output Compare1	Compare Match	Select the Counter Clear Source.
Output > TOC0 Output	Disabled Start Level Low and Toggle Output Start Level High and Toggle Output	Disabled	Configure TOC0 output.
Output > TOC1 Output	Disabled Start Level Low and Toggle Output Start Level High and Toggle Output	Disabled	Configure TOC1 output.
Output > TOC0 Output Enable	Output Disable Output Enable	Output Disable	Configure TOC0 output enable.
Output > TOC1 Output Enable	Output Disable Output Enable	Output Disable	Configure TOC1 output enable.
Input > TIC0 Capture Trigger	Rising Edge Falling Edge Both Edge	Rising Edge	Select the trigger edge.
Input > TIC1 Capture Trigger	Rising Edge Falling Edge Both Edge	Rising Edge	Select the trigger edge.
Input > TIC0 Input Enable	Input Disable Input Enable	Input Disable	Configure TIC0 output enable.
Input > TIC1 Input Enable	Input Disable Input Enable	Input Disable	Configure TIC1 output enable.
Interrupts > Callback	Name must be a valid C symbol	NULL	A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the timer period elapses.
Interrupts > Compare Match Interrupt Priority	MCU Specific Options		Select the compare match interrupt priority.
Interrupts > Input Capture 0 Interrupt Priority	MCU Specific Options		Select the input capture 0 interrupt priority.
Interrupts > Input Capture 1 Interrupt Priority	MCU Specific Options		Select the input capture 1 interrupt priority.
Interrupts > Output Compare 0 Interrupt Priority	MCU Specific Options		Select the output compare 0 interrupt priority.
Interrupts > Output Compare 1 Interrupt Priority	MCU Specific Options		Select the output compare 1 interrupt priority.

Clock Configuration

The CMTW clock is used to the PCLKB frequency. You can set the PCLKB frequency using the Clocks tab of the RX Configuration editor or by using the CGC Interface at run-time.

Pin Configuration

This module can use CMWCOR, CMWICR0, CMWICR1, CMWOCR0, and CMWOCR1 event as counter clear source.

This module can use TIC0, TIC1, TIC2, and TIC3 as input pins to measure input signals.

This module can use TOC0, TOC1, TOC2, and TOC3 as output pins for periodic signals.

Usage Notes

Maximum Period

The RX Configuration editor will automatically calculate the period count value and source clock divider based on the selected period time, units and clock speed.

When the selected period unit is "Raw counts", the maximum period setting is 0x2000000 for 16-bit or 0x20000000000 for 32-bit. This will configure the timer with the maximum period and a count clock divisor of 512.

Note

When manually changing the timer period counts the maximum value for a 16-bit CMTW is 0x10000, and 32-bit is 0x100000000. This number overflows the 16-bit or 32-bit value for timer_cfg_t::period_counts. To configure the timer for the maximum period, set timer_cfg_t::period_counts to 0.

Updating Period

The period is updated after the next counter overflow after calling R_CMTW_PeriodSet(). To force them to update before the next counter overflow, call R_CMTW_Reset() while the counter is running.

One-Shot Mode

The CMTW timer does not support one-shot mode natively. One-shot mode is achieved by stopping the timer in the interrupt service routine before the callback is called. If the interrupt is not serviced before the timer period expires again, the timer generates more than one event. The callback is only called once in this case, but multiple events may be generated if the timer is linked to the Transfer (r_dtc).

One-Shot Mode Output

Examples of one-shot signals that can be generated by this module are shown below:

CMTW One-Shot Output

Periodic Mode

Frequency dividing clock is selected from four frequency dividing clocks obtained by dividing the peripheral module clock (PCLKB), the CMWCNT counter starts counting up using the selected clock. When clearing of the counter is selected by counter clear register. The CMWCNT counter becomes 0000 0000h and continues counting. Otherwise, an overflow is generated when FFFF FFFFh changes to 0000 0000h during 32-bit count operation and 0000 FFFFh changes to 0000 0000h during 16-bit operation, and the CMWCNT counter continues counting.

Periodic Mode Output:

The TOC pin toggles twice each time the timer expires in periodic mode. This is achieved by defining a PWM wave at a 50 percent duty cycle so that the period of the resulting square (from rising edge to rising edge) matches the period of the CMTW timer.

Examples of periodic signals that can be generated by this module are shown below:

CMTW Periodic Output

Event Counting

Event counting can be done by selecting counting sources from CMWCR, ELC events.

Note

In event counting mode, the application must call R_CMTW_Start() to enable event counting. The counter will not change after calling R_CMTW_Start() until an event occurs.

Controlling CMTW with ELC Events (optional)

The CMTW timer can be configured to start, count, restart when an ELC event occurs.

Note

Event signal input and output are available for CMTW0 only (channel 0).

Enabling External Sources for Input Capture

R_CMTW_Enable() must be called when external sources are used for the input capture.

Examples

CMTW Basic Example

This is a basic example of minimal use of the CMTW in an application.

void cmtw_basic_example (void)
{
    fsp_err_t err = FSP_SUCCESS;


    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);


    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);


    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);

}

void cmtw_reset_example (void)
{
    fsp_err_t err = FSP_SUCCESS;


    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);


    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);


    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);



    /* Reset the counter. */
    (void) R_CMTW_Reset(&g_timer0_ctrl);



    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_CMTW_StatusGet(&g_timer0_ctrl, &status);

}

CMTW Callback example

This is an example of a timer callback.

/* Example callback called when timer expires. */
void timer_callback (timer_callback_args_t * p_args)
{
    if (TIMER_EVENT_CYCLE_END == p_args->event)
    {
        /* Add application code to be called periodically here. */
    }
}

CMTW Free Running Counter Example

To use the CMTW as a free running counter, select periodic mode and set the the Period to 0xFFFF for a 16-bit timer or 0xFFFFFFFF for a 32-bit timer.

void cmtw_counter_example (void)
{
    fsp_err_t err = FSP_SUCCESS;

    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);

    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);

    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);


    /* (Optional) Stop the timer. */
    (void) R_CMTW_Stop(&g_timer0_ctrl);



    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_CMTW_StatusGet(&g_timer0_ctrl, &status);

}

CMTW Input Capture Example

This is an example of using the CMTW to capture pulse width or pulse period measurements.

/* Example callback called when a capture occurs. */
uint64_t g_captured_time     = 0U;
uint32_t g_capture_overflows = 0U;
void timer_capture_callback (timer_callback_args_t * p_args)
{
    if ((TIMER_EVENT_CAPTURE_A == p_args->event) || (TIMER_EVENT_CAPTURE_B == p_args->event))
    {

        /* (Optional) Get the current period if not known. */
        timer_info_t info;
        (void) R_CMTW_InfoGet(&g_timer0_ctrl, &info);
        uint64_t period = info.period_counts;

        /* The maximum period is one more than the maximum 32-bits number, but will be reflected as 0 in
         * timer_info_t::period_counts. */
        if (0U == period)
        {
            period = UINT32_MAX + 1U;
        }


        g_captured_time     = (period * g_capture_overflows) + p_args->capture;
        g_capture_overflows = 0U;
    }

    if (TIMER_EVENT_CYCLE_END == p_args->event)
    {
        /* An overflow occurred during capture. This must be accounted for at the application layer. */
        g_capture_overflows++;
    }
}

void cmtw_capture_example (void)
{
    fsp_err_t err = FSP_SUCCESS;

    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);

    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);


    /* Enable captures. Captured values arrive in the interrupt. */
    (void) R_CMTW_Enable(&g_timer0_ctrl);



    /* (Optional) Disable captures. */
    (void) R_CMTW_Disable(&g_timer0_ctrl);

}

CMTW Period Update Example

This an example of updating the period.

#define CMTW_EXAMPLE_MSEC_PER_SEC           (1000)
#define CMTW_EXAMPLE_DESIRED_PERIOD_MSEC    (20)

/* This example shows how to calculate a new period value at runtime. */
void cmtw_period_calculation_example (void)
{
    fsp_err_t err = FSP_SUCCESS;

    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);

    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);

    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);


    /* Get the source clock frequency (in Hz). There are 3 ways to do this in FSP:
     *  - If the PCLKB frequency has not changed since reset, the source clock frequency is
     *    BSP_STARTUP_PCLKB_HZ >> timer_cfg_t::source_div
     *  - Use the R_CMTW_InfoGet function (it accounts for the divider).
     *  - Calculate the current PCLKB frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKB) and right shift
     *    by timer_cfg_t::source_div.
     *
     * This example uses the 3rd option (R_FSP_SystemClockHzGet).
     */
    uint32_t pclk_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKB) >> g_timer0_cfg.source_div;

    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
     * desired period is larger than UINT32_MAX / pclk_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
        (uint32_t) (((uint64_t) pclk_freq_hz * CMTW_EXAMPLE_DESIRED_PERIOD_MSEC) / CMTW_EXAMPLE_MSEC_PER_SEC);

    /* Set the calculated period. */
    err = R_CMTW_PeriodSet(&g_timer0_ctrl, period_counts);
    assert(FSP_SUCCESS == err);

}

Data Structures
struct	cmtw_instance_ctrl_t
struct	cmtw_extended_cfg_t

Enumerations
enum	cmtw_source_edge_t
enum	cmtw_output_pin_t
enum	cmtw_clear_source_t
enum	cmtw_io_pin_t
enum	cmtw_output_control_t
enum	cmtw_input_control_t

---

Data Structure Documentation

cmtw_instance_ctrl_t

struct cmtw_instance_ctrl_t

Channel control block. DO NOT INITIALIZE. Initialization occurs when timer_api_t::open is called.

cmtw_extended_cfg_t

struct cmtw_extended_cfg_t

Optional CMTW extension data structure.

Data Fields
cmtw_output_pin_t	toc0	Configure TOC0 pin.
cmtw_output_pin_t	toc1	Configure TOC1 pin.
cmtw_output_control_t	toc0_control	Output Compare 0 enable setting.
cmtw_output_control_t	toc1_control	Output Compare 1 enable setting.
cmtw_source_edge_t	capture_ic0_source	Event sources that trigger capture of TIC0.
cmtw_source_edge_t	capture_ic1_source	Event sources that trigger capture of TIC1.
cmtw_input_control_t	ic0_control	Input Capture 0 enable setting.
cmtw_input_control_t	ic1_control	Input Capture 1 enable setting.
cmtw_clear_source_t	clear_source	Counter clear source.
timer_variant_t	counter_size	Timer counter size.
uint8_t	capture_ic0_ipl	Input Capture 0 interrupt priority.
uint8_t	capture_ic1_ipl	Input Capture 1 interrupt priority.
IRQn_Type	capture_ic0_irq	Input Capture 0 interrupt.
IRQn_Type	capture_ic1_irq	Input Capture 1 interrupt.
uint8_t	compare_oc0_ipl	Output Compare 0 interrupt priority.
uint8_t	compare_oc1_ipl	Output Compare 1 interrupt priority.
IRQn_Type	compare_oc0_irq	Output Compare 0 interrupt.
IRQn_Type	compare_oc1_irq	Output Compare 1 interrupt.

Enumeration Type Documentation

cmtw_source_edge_t

enum cmtw_source_edge_t

Trigger edge for Input capture function.

Enumerator
CMTW_SOURCE_EDGE_RISING	Input capture trigger on rising edge.
CMTW_SOURCE_EDGE_FALLING	Input capture trigger on falling edge.
CMTW_SOURCE_EDGE_BOTH	Input capture trigger on both edge.

cmtw_output_pin_t

enum cmtw_output_pin_t

Level of CMTW pin

Enumerator
CMTW_OUTPUT_PIN_RETAIN	Retain output value.
CMTW_OUTPUT_PIN_START_LEVEL_LOW	Pin level low.
CMTW_OUTPUT_PIN_START_LEVEL_HIGH	Pin level high.

cmtw_clear_source_t

enum cmtw_clear_source_t

Clear source of CMWCNT

Enumerator
CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWCOR	Counter is cleared by CMWCOR compare match.
CMTW_CLEAR_SOURCE_DISABLED	Counter is not cleared.
CMTW_CLEAR_SOURCE_INPUT_CAPTURE_CMWICR0	Counter is cleared by CMWICR0 input capture.
CMTW_CLEAR_SOURCE_INPUT_CAPTURE_CMWICR1	Counter is cleared by CMWICR1 input capture.
CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWOCR0	Counter is cleared by CMWOCR0 output compare.
CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWOCR1	Counter is cleared by CMWOCR1 output compare.

cmtw_io_pin_t

enum cmtw_io_pin_t

Output pins, used to select

Enumerator
CMTW_IO_PIN_TOC0	TOC0.
CMTW_IO_PIN_TOC1	TOC1.
CMTW_IO_PIN_TOC0_AND_TOC1	TOC0 and TOC1.

cmtw_output_control_t

enum cmtw_output_control_t

Enumerator
CMTW_OUTPUT_CONTROL_DISABLED	OutputCompare disabled.
CMTW_OUTPUT_CONTROL_ENABLED	OutputCompare enabled.

cmtw_input_control_t

enum cmtw_input_control_t

Enumerator
CMTW_INPUT_CONTROL_DISABLED	InputCapture disabled.
CMTW_INPUT_CONTROL_ENABLED	InputCapture enabled.

Function Documentation

R_CMTW_Open()

fsp_err_t R_CMTW_Open	(	timer_ctrl_t *const	p_ctrl,
		timer_cfg_t const *const	p_cfg
	)

Initializes the CMTW module instance. Implements timer_api_t::open.

The CMTW hardware does not support one-shot functionality natively. The one-shot feature is therefore implemented in the CMTW HAL layer. For a timer configured as a one-shot timer, the timer is stopped upon the first timer expiration.

The CMTW implementation of the general timer can accept an optional cmtw_extended_cfg_t extension parameter.

Return values

FSP_SUCCESS	Initialization was successful.
FSP_ERR_ASSERTION	A required input pointer is NULL or the period is not in the valid range of 1 to 0xFFFF in 16bit counter or 1 to 0xFFFFFFFF in 32bit counter.
FSP_ERR_ALREADY_OPEN	R_CMTW_Open has already been called for this p_ctrl.
FSP_ERR_IRQ_BSP_DISABLED	A required interrupt has not been enabled in the vector table.
FSP_ERR_IP_CHANNEL_NOT_PRESENT	Requested channel number is not available on CMTW.

R_CMTW_Stop()

fsp_err_t R_CMTW_Stop

(

timer_ctrl_t *const

p_ctrl

)

Stops the timer. Implements timer_api_t::stop.

Return values

FSP_SUCCESS	Timer stopped.
FSP_ERR_ASSERTION	p_ctrl was NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_Start()

fsp_err_t R_CMTW_Start

(

timer_ctrl_t *const

p_ctrl

)

Starts timer. Implements timer_api_t::start.

Return values

FSP_SUCCESS	Timer started.
FSP_ERR_ASSERTION	p_ctrl is null.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_Reset()

fsp_err_t R_CMTW_Reset

(

timer_ctrl_t *const

p_ctrl

)

Resets the counter value to 0. Implements timer_api_t::reset.

Return values

FSP_SUCCESS	Counter reset.
FSP_ERR_ASSERTION	p_ctrl is NULL
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_Enable()

fsp_err_t R_CMTW_Enable

(

timer_ctrl_t *const

p_ctrl

)

Enables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::enable.

Return values

FSP_SUCCESS	External events successfully enabled.
FSP_ERR_ASSERTION	p_ctrl was NULL.
FSP_ERR_NOT_OPEN	The instance is not opened.

R_CMTW_Disable()

fsp_err_t R_CMTW_Disable

(

timer_ctrl_t *const

p_ctrl

)

Disables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::disable.

Return values

FSP_SUCCESS	External events successfully disabled.
FSP_ERR_ASSERTION	p_ctrl was NULL.
FSP_ERR_NOT_OPEN	The instance is not opened.

R_CMTW_PeriodSet()

fsp_err_t R_CMTW_PeriodSet	(	timer_ctrl_t *const	p_ctrl,
		uint32_t const	period_counts
	)

Updates period. The new period is updated immediately. Implements timer_api_t::periodSet.

Warning

Stop the timer before calling this function if one-shot output is used.

Return values

FSP_SUCCESS	Period value updated.
FSP_ERR_ASSERTION	A required pointer was NULL, or the period was not in the valid range of 1 to 0xFFFF in 16bit counter or 1 to 0xFFFFFFFF in 32bit counter.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_DutyCycleSet()

fsp_err_t R_CMTW_DutyCycleSet	(	timer_ctrl_t *const	p_ctrl,
		uint32_t const	duty_cycle_counts,
		uint32_t const	pin
	)

Updates duty cycle. If the timer is counting, the new duty cycle is reflected after the next counter underflow. Implements timer_api_t::dutyCycleSet.

Return values

FSP_ERR_UNSUPPORTED

CMTW duty cycle set is not supported.

R_CMTW_InfoGet()

fsp_err_t R_CMTW_InfoGet	(	timer_ctrl_t *const	p_ctrl,
		timer_info_t *const	p_info
	)

Gets timer information and store it in provided pointer p_info. Implements timer_api_t::infoGet.

Return values

FSP_SUCCESS	Period, count direction, and frequency stored in p_info.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_StatusGet()

fsp_err_t R_CMTW_StatusGet	(	timer_ctrl_t *const	p_ctrl,
		timer_status_t *const	p_status
	)

Retrieves the current state and counter value stores them in p_status. Implements timer_api_t::statusGet.

Return values

FSP_SUCCESS	Current status and counter value provided in p_status.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_OutputEnable()

fsp_err_t R_CMTW_OutputEnable	(	timer_ctrl_t *const	p_ctrl,
		cmtw_io_pin_t	pin
	)

Enable output for TOC0 and/or TOC1.

Return values

FSP_SUCCESS	Output is enabled.
FSP_ERR_ASSERTION	p_ctrl or p_status was NULL.
FSP_ERR_NOT_OPEN	The instance is not opened.

R_CMTW_OutputDisable()

fsp_err_t R_CMTW_OutputDisable	(	timer_ctrl_t *const	p_ctrl,
		cmtw_io_pin_t	pin
	)

Disable output for TOC0 and/or TOC1.

Return values

FSP_SUCCESS	Output is disabled.
FSP_ERR_ASSERTION	p_ctrl or p_status was NULL.
FSP_ERR_NOT_OPEN	The instance is not opened.

R_CMTW_CallbackSet()

fsp_err_t R_CMTW_CallbackSet	(	timer_ctrl_t *const	p_ctrl,
		void(*)(timer_callback_args_t *)	p_callback,
		void *const	p_context,
		timer_callback_args_t *const	p_callback_memory
	)

Updates the user callback with the option to provide memory for the callback argument structure. Implements timer_api_t::callbackSet.

Return values

FSP_SUCCESS	Callback updated successfully.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened.

R_CMTW_Close()

fsp_err_t R_CMTW_Close

(

timer_ctrl_t *const

p_ctrl

)

Stops counter, disables interrupts, disables output pins, and clears internal driver data. Implements timer_api_t::close.

Return values

FSP_SUCCESS	Timer closed.
FSP_ERR_ASSERTION	p_ctrl is NULL.
FSP_ERR_NOT_OPEN	The instance control structure is not opened.

R_CMTW_CompareMatchSet()

fsp_err_t R_CMTW_CompareMatchSet	(	timer_ctrl_t *const	p_ctrl,
		uint32_t const	compare_match_value,
		timer_compare_match_t const	match_channel
	)

Placeholder for unsupported compareMatch function. Implements timer_api_t::compareMatchSet.

Return values

FSP_ERR_UNSUPPORTED

CMTW compare match is not supported.