RZV Flexible Software Package Documentation
Release v3.0.0
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Driver for the CMTW peripheral on RZ MPUs. This module implements the Timer Interface.
The CMTW module has the following features:
Configuration | Options | Default | Description |
---|---|---|---|
Parameter Checking |
| Default (BSP) | If selected code for parameter checking is included in the build. |
Configuration | Options | Default | Description |
---|---|---|---|
General > Name | Name must be a valid C symbol | g_timer0 | Module name. |
General > Channel | Channel number does not exist | 0 | Physical hardware channel. |
General > Mode |
| Periodic | Mode selection. Note: One-shot mode is implemented in software. ISR's must be enabled for one shot even if callback is unused. |
General > Period | Value must be non-negative | 0x10000 | Specify the timer period based on the selected unit. |
General > Period Unit |
| Raw Counts | Unit of the period specified above |
General > Counter Size |
| 32-bit | Size of the timer counter |
General > Counter Clear Source |
| Compare Match | Select the Counter Clear Source. |
Output > TOC0 Output |
| Disabled | Configure TOC0 output. |
Output > TOC1 Output |
| Disabled | Configure TOC1 output. |
Output > TOC0 Output Enable |
| Output Disable | Configure TOC0 output enable. |
Output > TOC1 Output Enable |
| Output Disable | Configure TOC1 output enable. |
Input > TIC0 Capture Trigger |
| Rising Edge | Select the trigger edge. |
Input > TIC1 Capture Trigger |
| Rising Edge | Select the trigger edge. |
Input > TIC0 Input Enable |
| Input Disable | Configure TIC0 output enable. |
Input > TIC1 Input Enable |
| Input Disable | Configure TIC1 output enable. |
Interrupts > Callback | Name must be a valid C symbol | NULL | A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the timer period elapses. |
Interrupts > Compare Match Interrupt Enable | MCU Specific Options | Compare match interrupt enanble. | |
Interrupts > Compare Match Interrupt Priority | Value must be an integer between 0 and 255 | 5 | Compare match interrupt priority. |
Interrupts > Input Capture 0 Interrupt Enable | MCU Specific Options | Input capture 0 interrupt enanble. | |
Interrupts > Input Capture 0 Interrupt Priority | Value must be an integer between 0 and 255 | 5 | Input capture 0 interrupt priority. |
Interrupts > Input Capture 1 Interrupt Enable | MCU Specific Options | Input capture 1 interrupt enanble. | |
Interrupts > Input Capture 1 Interrupt Priority | Value must be an integer between 0 and 255 | 5 | Input capture 1 interrupt priority. |
Interrupts > Output Compare 0 Interrupt Enable | MCU Specific Options | Output capture 0 interrupt enanble. | |
Interrupts > Output Compare 0 Interrupt Priority | Value must be an integer between 0 and 255 | 5 | Output capture 0 interrupt priority. |
Interrupts > Output Compare 1 Interrupt Enable | MCU Specific Options | Output capture 1 interrupt enanble. | |
Interrupts > Output Compare 1 Interrupt Priority | Value must be an integer between 0 and 255 | 5 | Output capture 1 interrupt priority. |
The CMTW clock is based on the PLLCM33 and PLLCLN. You can set the clock frequency using the Clocks tab of the FSP Configuration editor or by using the CGC Interface at run-time.
This module can use the TOC0 and TOC1 pins as output pins for output compare or one-shot signals.
For input capture, the input signal must be applied to the TIC0 or TIC1 pin.
The FSP Configuration editor will automatically calculate the period count value and source clock divider based on the selected period time, units, and clock speed.
Channel | Clock source | Maximum period (counts) |
---|---|---|
CMTW0-CMTW3 | PLLCM33 clock | 0x100000000 |
CMTW4-CMTW7 | PLLCLN clock | 0x100000000 |
The CMTW timer does not support one-shot mode natively. One-shot mode is achieved by stopping the timer in the interrupt service routine before the callback is called. If the interrupt is not serviced before the timer period expires again, the timer generates more than one event. The callback is only called once in this case, but multiple events may be generated if the timer is linked to the DMAC.
Examples of one-shot signals that can be generated by this module are shown below:
The TOC0 or TOC1 pin toggles each time the timer expires in output compare mode.
Examples of periodic signals that can be generated by this module are shown below:
This is a basic example of minimal use of the CMTW in an application.
This is an example of a timer callback.
To use the CMTW as a free running counter, select periodic mode and set the the Period to 0xFFFF (16-bit counter) or 0xFFFFFFFF (32-bit counter).
This is an example of using the CMTW to capture pulse width or pulse period measurements.
This an example of updating the period.
Data Structures | |
struct | cmtw_instance_ctrl_t |
struct | cmtw_extended_cfg_t |
Enumerations | |
enum | cmtw_source_edge_t |
enum | cmtw_output_pin_t |
enum | cmtw_clear_source_t |
enum | cmtw_io_pin_t |
enum | cmtw_output_control_t |
enum | cmtw_input_control_t |
struct cmtw_instance_ctrl_t |
Channel control block. DO NOT INITIALIZE. Initialization occurs when timer_api_t::open is called.
struct cmtw_extended_cfg_t |
Optional CMTW extension data structure.
Data Fields | ||
---|---|---|
cmtw_output_pin_t | toc0 | Configure TOC0 pin. |
cmtw_output_pin_t | toc1 | Configure TOC1 pin. |
cmtw_output_control_t | toc0_control | OutputCompare0 enable setting. |
cmtw_output_control_t | toc1_control | OutputCompare1 enable setting. |
cmtw_source_edge_t | capture_ic0_source | Event sources that trigger capture of TIC0. |
cmtw_source_edge_t | capture_ic1_source | Event sources that trigger capture of TIC1. |
cmtw_input_control_t | ic0_control | InputCapture0 enable setting. |
cmtw_input_control_t | ic1_control | InputCapture1 enable setting. |
cmtw_clear_source_t | clear_source | Counter clear source. |
timer_variant_t | counter_size | Timer counter size. |
uint8_t | capture_ic0_ipl | InputCapture 0 interrupt priority. |
uint8_t | capture_ic1_ipl | InputCapture 1 interrupt priority. |
IRQn_Type | capture_ic0_irq | InputCapture 0 interrupt. |
IRQn_Type | capture_ic1_irq | InputCapture 1 interrupt. |
uint8_t | compare_oc0_ipl | OutputCompare 0 interrupt priority. |
uint8_t | compare_oc1_ipl | OutputCompare 1 interrupt priority. |
IRQn_Type | compare_oc0_irq | OutputCompare 0 interrupt. |
IRQn_Type | compare_oc1_irq | OutputCompare 1 interrupt. |
enum cmtw_source_edge_t |
enum cmtw_output_pin_t |
enum cmtw_clear_source_t |
Clear source of CMWCNT
enum cmtw_io_pin_t |
enum cmtw_input_control_t |
fsp_err_t R_CMTW_Close | ( | timer_ctrl_t *const | p_ctrl | ) |
Stops counter, disables interrupts, disables output pins, and clears internal driver data. Implements timer_api_t::close.
FSP_SUCCESS | Timer closed. |
FSP_ERR_ASSERTION | p_ctrl is NULL. |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_PeriodSet | ( | timer_ctrl_t *const | p_ctrl, |
uint32_t const | period_counts | ||
) |
Updates period. The new period is updated immediately. Implements timer_api_t::periodSet.
Example:
FSP_SUCCESS | Period value updated. |
FSP_ERR_ASSERTION | A required pointer was NULL, or the period was not in the valid range of 1 to 0xFFFF in 16bit counter or 1 to 0xFFFFFFFF in 32bit counter. |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_DutyCycleSet | ( | timer_ctrl_t *const | p_ctrl, |
uint32_t const | duty_cycle_counts, | ||
uint32_t const | pin | ||
) |
Updates duty cycle. If the timer is counting, the new duty cycle is reflected after the next counter underflow. Implements timer_api_t::dutyCycleSet.
FSP_ERR_UNSUPPORTED | CMTW duty cycle set is not supported. |
fsp_err_t R_CMTW_Reset | ( | timer_ctrl_t *const | p_ctrl | ) |
Resets the counter value to 0. Implements timer_api_t::reset.
FSP_SUCCESS | Counter reset. |
FSP_ERR_ASSERTION | p_ctrl is NULL |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_Start | ( | timer_ctrl_t *const | p_ctrl | ) |
Starts timer. Implements timer_api_t::start.
Example:
FSP_SUCCESS | Timer started. |
FSP_ERR_ASSERTION | p_ctrl is null. |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_Enable | ( | timer_ctrl_t *const | p_ctrl | ) |
Enables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::enable.
Example:
FSP_SUCCESS | External events successfully enabled. |
FSP_ERR_ASSERTION | p_ctrl was NULL. |
FSP_ERR_NOT_OPEN | The instance is not opened. |
fsp_err_t R_CMTW_Disable | ( | timer_ctrl_t *const | p_ctrl | ) |
Disables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::disable.
Example:
FSP_SUCCESS | External events successfully disabled. |
FSP_ERR_ASSERTION | p_ctrl was NULL. |
FSP_ERR_NOT_OPEN | The instance is not opened. |
fsp_err_t R_CMTW_InfoGet | ( | timer_ctrl_t *const | p_ctrl, |
timer_info_t *const | p_info | ||
) |
Gets timer information and store it in provided pointer p_info. Implements timer_api_t::infoGet.
Example:
FSP_SUCCESS | Period, count direction, and frequency stored in p_info. |
FSP_ERR_ASSERTION | A required pointer is NULL. |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_StatusGet | ( | timer_ctrl_t *const | p_ctrl, |
timer_status_t *const | p_status | ||
) |
Retrieves the current state and counter value stores them in p_status. Implements timer_api_t::statusGet.
Example:
FSP_SUCCESS | Current status and counter value provided in p_status. |
FSP_ERR_ASSERTION | A required pointer is NULL. |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_Stop | ( | timer_ctrl_t *const | p_ctrl | ) |
Stops the timer. Implements timer_api_t::stop.
Example:
FSP_SUCCESS | Timer stopped. |
FSP_ERR_ASSERTION | p_ctrl was NULL. |
FSP_ERR_NOT_OPEN | The instance control structure is not opened. |
fsp_err_t R_CMTW_Open | ( | timer_ctrl_t *const | p_ctrl, |
timer_cfg_t const *const | p_cfg | ||
) |
Initializes the CMTW module instance. Implements timer_api_t::open.
The CMTW hardware does not support one-shot functionality natively. The one-shot feature is therefore implemented in the CMTW HAL layer. For a timer configured as a one-shot timer, the timer is stopped upon the first timer expiration.
The CMTW implementation of the general timer can accept an optional cmtw_extended_cfg_t extension parameter.
Example:
FSP_SUCCESS | Initialization was successful and timer has started. |
FSP_ERR_ASSERTION | A required input pointer is NULL or the period is not in the valid range of 1 to 0xFFFF in 16bit counter or 1 to 0xFFFFFFFF in 32bit counter. |
FSP_ERR_ALREADY_OPEN | R_CMTW_Open has already been called for this p_ctrl. |
FSP_ERR_IRQ_BSP_DISABLED | A required interrupt has not been enabled in the vector table. |
FSP_ERR_IP_CHANNEL_NOT_PRESENT | Requested channel number is not available on CMTW. |
fsp_err_t R_CMTW_OutputEnable | ( | timer_ctrl_t *const | p_ctrl, |
cmtw_io_pin_t | pin | ||
) |
Enable output for TOC0 and/or TOC1.
FSP_SUCCESS | Output is enabled. |
FSP_ERR_ASSERTION | p_ctrl or p_status was NULL. |
FSP_ERR_NOT_OPEN | The instance is not opened. |
fsp_err_t R_CMTW_OutputDisable | ( | timer_ctrl_t *const | p_ctrl, |
cmtw_io_pin_t | pin | ||
) |
Disable output for TOC0 and/or TOC1.
FSP_SUCCESS | Output is disabled. |
FSP_ERR_ASSERTION | p_ctrl or p_status was NULL. |
FSP_ERR_NOT_OPEN | The instance is not opened. |
fsp_err_t R_CMTW_CallbackSet | ( | timer_ctrl_t *const | p_api_ctrl, |
void(*)(timer_callback_args_t *) | p_callback, | ||
void const *const | p_context, | ||
timer_callback_args_t *const | p_callback_memory | ||
) |
Updates the user callback with the option to provide memory for the callback argument structure. Implements timer_api_t::callbackSet.
FSP_SUCCESS | Callback updated successfully. |
FSP_ERR_ASSERTION | A required pointer is NULL. |
FSP_ERR_NOT_OPEN | The control block has not been opened. |