Build Time Configurations for ra2e3_fsp
The following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:
| Configuration | Options | Default | Description  | 
| Enable inline BSP IRQ functions | 
 | Disabled  | Using static inline functions will slightly increase code size, but will slightly decrease cycles taken in ISRs in return.  | 
| Use Low Voltage Mode | Not Supported | Not Supported  | Use the low voltage mode. This limits the ICLK operating frequency to 4 MHz and requires all clock dividers to be at least 4 when oscillation stop detection is used.  | 
| Main Oscillator Wait Time | 
- 
2 cycles
 
- 
1024 cycles
 
- 
2048 cycles
 
- 
4096 cycles
 
- 
8192 cycles
 
- 
16384 cycles
 
- 
32768 cycles
 
- 
65536 cycles
 
- 
131072 cycles
 
- 
262144 cycles
 
 
 | 262144 cycles  | Number of cycles to wait for the main oscillator clock to stabilize.  | 
 
◆ BSP_ELC_PERIPHERAL_MASK
      
        
          | #define BSP_ELC_PERIPHERAL_MASK | 
        
      
 
Positions of event link set registers (ELSRs) available on this MCU 
 
 
◆ elc_event_t
Sources of event signals to be linked to other peripherals or the CPU 
- Note
 - This list is device specific. 
 
 
 
◆ icu_event_t
Events to be used with the IELSR register to link interrupt events to the NVIC 
- Note
 - This list is device specific. 
 
 
 
◆ elc_peripheral_t
Possible peripherals to be linked to event signals 
- Note
 - This list is device specific.