Build Time Configurations for ra2l1_fsp
The following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:
Configuration | Options | Default | Description |
Power |
DC-DC Regulator |
-
Disabled
-
Enabled
-
Enabled at startup
| Disabled | To use the DCDC regulator an external inductor and capacitor must be connected as specified in chapter 40 of the RA2L1 manual. In addition the supply voltage must be above 2.4V and ICLK must be 2 MHz or higher.
When set to 'Enabled at startup' the BSP will switch to the DCDC regulator during startup using the voltage range specified below. |
DC-DC Supply Range |
-
2.4V to 2.7V
-
2.7V to 3.6V
-
3.6V to 4.5V
-
4.5V to 5.5V
| 2.7V to 3.6V | Set this to the expected MCU supply voltage (Vcc) at startup when using the DCDC regulator. |
Enable inline BSP IRQ functions |
| Disabled | Using static inline functions will slightly increase code size, but will slightly decrease cycles taken in ISRs in return. |
Use Low Voltage Mode | Not Supported | Not Supported | Use the low voltage mode. This limits the ICLK operating frequency to 4 MHz and requires all clock dividers to be at least 4 when oscillation stop detection is used. |
Main Oscillator Wait Time |
-
2 cycles
-
1024 cycles
-
2048 cycles
-
4096 cycles
-
8192 cycles
-
16384 cycles
-
32768 cycles
-
65536 cycles
-
131072 cycles
-
262144 cycles
| 262144 cycles | Number of cycles to wait for the main oscillator clock to stabilize. |
Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file.
◆ BSP_ELC_PERIPHERAL_MASK
#define BSP_ELC_PERIPHERAL_MASK |
Positions of event link set registers (ELSRs) available on this MCU
◆ elc_event_t
Sources of event signals to be linked to other peripherals or the CPU
- Note
- This list is device specific.
◆ icu_event_t
Events to be used with the IELSR register to link interrupt events to the NVIC
- Note
- This list is device specific.
◆ elc_peripheral_t
Possible peripherals to be linked to event signals
- Note
- This list is device specific.
◆ bsp_power_mode_t
Voltage regulator mode
Enumerator |
---|
BSP_POWER_MODE_DCDC_2V4_TO_2V7 | DCDC mode; 2.4V to 2.7V supply.
|
BSP_POWER_MODE_DCDC_2V7_TO_3V6 | DCDC mode; 2.7V to 3.6V supply.
|
BSP_POWER_MODE_DCDC_3V6_TO_4V5 | DCDC mode; 3.6V to 4.5V supply.
|
BSP_POWER_MODE_DCDC_4V5_TO_5V5 | DCDC mode; 4.5V to 5.5V supply.
|
BSP_POWER_MODE_LDO | LDO mode.
|
◆ R_BSP_PowerModeSet()
Select either the LDO or DCDC regulator and/or update the MCU supply voltage range. Returns the previously selected mode.
- Note
- DCDC mode has the following limitations:
- Supply voltage must be 2.4V or greater
- Low- and Subosc-speed modes are not available
- Software Standby is not available Ensure these limitations are respected before entering DCDC mode. If supply voltage may drop below 2.4V during operation, configure a LVD channel to interrupt or reset the MCU near this threshold to switch back to the LDO.
-
Switching to DCDC mode temporarily disables all interrupts and blocks for 22 microseconds; switching to LDO from DCDC temporarily disables all peripherals and interrupts and blocks for 60 microseconds.
-
If the supply voltage falls outside the range originally specified when starting the DCDC regulator, call this function again with the updated supply voltage.
- Returns
- The previously selected power mode.