RA Flexible Software Package Documentation  Release v5.9.0

 
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Detailed Description

Build Time Configurations for ra4e1_fsp

The following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:

ConfigurationOptionsDefaultDescription
Security
OFS0 register settings
OFS1_SEL register settings
OFS1 register settings
Block Protection Settings (BPS)
Permanent Block Protection Settings (PBPS)
Clocks
Enable inline BSP IRQ functions
  • Enabled
  • Disabled
Enabled Using static inline functions will slightly increase code size, but will slightly decrease cycles taken in ISRs in return.
Main Oscillator Wait Time
  • 3 cycles
  • 35 cycles
  • 67 cycles
  • 131 cycles
  • 259 cycles
  • 547 cycles
  • 1059 cycles
  • 2147 cycles
  • 4291 cycles
  • 8163 cycles
8163 cycles Number of cycles to wait for the main oscillator clock to stabilize.

Macros

#define BSP_ELC_PERIPHERAL_MASK
 

Enumerations

enum  elc_event_t
 
enum  elc_peripheral_t
 

Macro Definition Documentation

◆ BSP_ELC_PERIPHERAL_MASK

#define BSP_ELC_PERIPHERAL_MASK

Positions of event link set registers (ELSRs) available on this MCU

Enumeration Type Documentation

◆ elc_event_t

Sources of event signals to be linked to other peripherals or the CPU

Note
This list is device specific.

◆ elc_peripheral_t

Possible peripherals to be linked to event signals

Note
This list is device specific.