Driver for the PDC peripheral on RA MCUs. This module implements the CAPTURE Interface.
Overview
The PDC peripheral supports interfacing with external cameras by accepting timing and data signals in order to capture incoming data. A callback is invoked every time a frame of data is accepted.
Features
- Capture incoming data into a user defined buffer
- Data bytes per pixel can be configured
- Endianess of the incoming data can be specified
- Supports configuring capture width and height
- Supports configuring vertical and horizontal sync polarity
- Horizontal and Vertical position for image/data capture can be specified
- External clock to the camera module can be adjusted
- Choice between DMA and DTC to transfer out the captured data
- The specified user callback is invoked when a data frame is captured
Supported Devices
| Device Group | Devices |
| RA6 | RA6M2, RA6M3 |
Configuration
Build Time Configurations for r_pdc
The following build time configurations are defined in fsp_cfg/r_pdc_cfg.h:
| Configuration | Options | Default | Description |
| Parameter Checking |
-
Default (BSP)
-
Enabled
-
Disabled
| Default (BSP) | If selected code for parameter checking is included in the build. |
Configurations for Graphics > Parallel Data Capture (r_pdc)
This module can be added to the Stacks tab via New Stack > Graphics > Parallel Data Capture (r_pdc).
| Configuration | Options | Default | Description |
| General |
| Name | Name must be a valid C symbol | g_pdc0 | Module name. |
| Input |
| Input > Signal polarity |
| HSYNC |
| High | Specify the active polarity of the HSYNC signal. |
| VSYNC |
| High | Specify the active polarity of the VSYNC signal. |
| Input > Capture Specifications |
| Number of pixels to capture horizontally | Value must be an integer greater than 0 | 640 | Specify the number of horizontal pixels to capture. |
| Number of lines to capture vertically | Value must be an integer greater than 0 | 480 | Specify the number of vertical pixels to capture. |
| Horizontal pixel to start capture from | Value must be an integer | 0 | Specify the horizontal pixel to start capturing image data from. Allows an image smaller than the native resolution of a camera to be captured. |
| Line to start capture from | Value must be an integer | 0 | Specify the vertical line to start capturing image data from. Allows an image smaller than the native resolution of a camera to be captured. |
| Bytes per pixel | Value must be an integer greater than 0 | 2 | Specify the number of bytes per pixel of the captured image data. |
| Clock divider |
-
CLK/2
-
CLK/4
-
CLK/6
-
CLK/8
-
CLK/10
-
CLK/12
-
CLK/14
-
CLK/16
| CLK/2 | Specify the clock divider for clock frequency of the clock input PCKO to the PDC peripheral. |
| Endianess |
| Little | Specify the endianness of the captured image data. |
| Output |
| Output > Buffer |
| Number of image buffers | Value must be an integer greater than 0 | 1 | Specify the number of buffers to create. |
| Interrupts |
| Callback | Name must be a valid C symbol | g_pdc_user_callback | A user callback function must be provided. This callback is invoked for every successful frame capture and any error conditions |
| PDC Interrupt Priority | MCU Specific Options | | Select the PDC interrupt priority. |
| DTC Interrupt Priority | MCU Specific Options | | Select the DTC interrupt priority. |
Clock Configuration
The PDC peripheral module uses the PCLKB as its clock source. The maximum clock to the camera module is PCLKB / 2.
Pin Configuration
The PCKO pin is a clock output and should be connected to the clock input of the camera. The PIXCLK pin is a clock input and should be connected to the output pixel clock of the camera. Likewise, the HSYNC and VSYNC pins must be connected to the horizontal and vertical sync signals of the camera, respectively. The PIXD0-PIXD7 pins are the 8-bit data bus input and should be connected to the relevant output pins of the camera.
- Note
- Camera control and serial communication pins must be configured separately and are not controlled by this module.
Usage Notes
Interrupt Configuration
- PDC error interrupts are used by this module for reporting errors such as overrun, underrun, vertical line number setting and horizontal byte number setting errors.
- In addition to the PDC error interrupts, DMA or DTC interrupts are also used internally to perform data transfer from this peripheral to the specified image buffer.
- Receive data ready interrupt is used as activation source for DMA and DTC trigger.
Enabling Transfer Modules
- An option to select between DMAC or DTC is provided with DMA as the default transfer choice.
- For further details on DMA please refer Transfer (r_dmac)
- For further details on DTC please refer Transfer (r_dtc)
PDC setup with external camera
- Before configuring the external camera device the PDC Open API must be called in order to start clock output.
- Ensure that the memory pointed to by p_buffer is both valid and large enough to store a complete image.
- The amount of space required (in bytes) can be calculated as: size (bytes) = image width (pixels) * image height (lines) * number of bytes per pixel
- Ensure that the size above is divisible by and aligned to 32 bytes.
Examples
Basic Example
This is a basic example of minimal use of the PDC in an application. This example shows how this driver can be used for capturing data from an external I/O device such as an image sensor.
{
{
g_capture_ready = true;
}
}
void basic_example (void)
{
assert(FSP_SUCCESS == err);
camera_module_initialization();
g_capture_ready = false;
assert(FSP_SUCCESS == err);
uint32_t timeout_ms = PDC_DELAY_MS;
while ((true != g_capture_ready) && timeout_ms)
{
timeout_ms--;;
}
if (0U == timeout_ms)
{
__BKPT(0);
}
}
static void camera_module_initialization (void)
{
}
◆ pdc_extended_cfg_t
| struct pdc_extended_cfg_t |
Extended configuration structure for PDC.
| Data Fields |
|
pdc_clock_division_t |
clock_division |
Clock divider. |
|
pdc_endian_t |
endian |
Endian of capture data. |
|
pdc_hsync_polarity_t |
hsync_polarity |
Polarity of HSYNC input. |
|
pdc_vsync_polarity_t |
vsync_polarity |
Polarity of VSYNC input. |
|
uint8_t |
pdc_ipl |
PDC interrupt priority. |
|
uint8_t |
transfer_req_ipl |
Transfer interrupt priority. |
|
IRQn_Type |
pdc_irq |
PDC IRQ number. |
|
IRQn_Type |
transfer_req_irq |
Transfer request IRQ number. |
|
transfer_instance_t const * |
p_lower_lvl_transfer |
Pointer to the transfer instance the PDC should use. |
◆ pdc_instance_ctrl_t
| struct pdc_instance_ctrl_t |
PDC instance control block. DO NOT INITIALIZE.
◆ pdc_event_t
PDC events
| Enumerator |
|---|
| PDC_EVENT_TRANSFER_COMPLETE | Complete frame transferred by DMAC/DTC.
|
| PDC_EVENT_RX_DATA_READY | Receive data ready interrupt.
|
| PDC_EVENT_FRAME_END | Frame end interrupt.
|
| PDC_EVENT_ERR_OVERRUN | Overrun interrupt.
|
| PDC_EVENT_ERR_UNDERRUN | Underrun interrupt.
|
| PDC_EVENT_ERR_V_SET | Vertical line setting error interrupt.
|
| PDC_EVENT_ERR_H_SET | Horizontal byte number setting error interrupt.
|
◆ pdc_clock_division_t
Clock divider applied to PDC clock to provide PCKO output frequency
| Enumerator |
|---|
| PDC_CLOCK_DIVISION_2 | CLK / 2.
|
| PDC_CLOCK_DIVISION_4 | CLK / 4.
|
| PDC_CLOCK_DIVISION_6 | CLK / 6.
|
| PDC_CLOCK_DIVISION_8 | CLK / 8.
|
| PDC_CLOCK_DIVISION_10 | CLK / 10.
|
| PDC_CLOCK_DIVISION_12 | CLK / 12.
|
| PDC_CLOCK_DIVISION_14 | CLK / 14.
|
| PDC_CLOCK_DIVISION_16 | CLK / 16.
|
◆ pdc_endian_t
Endian of captured data
| Enumerator |
|---|
| PDC_ENDIAN_LITTLE | Data is in little endian format.
|
| PDC_ENDIAN_BIG | Data is in big endian format.
|
◆ pdc_hsync_polarity_t
Polarity of input HSYNC signal
| Enumerator |
|---|
| PDC_HSYNC_POLARITY_HIGH | HSYNC signal is active high.
|
| PDC_HSYNC_POLARITY_LOW | HSYNC signal is active low.
|
◆ pdc_vsync_polarity_t
Polarity of input VSYNC signal
| Enumerator |
|---|
| PDC_VSYNC_POLARITY_HIGH | VSYNC signal is active high.
|
| PDC_VSYNC_POLARITY_LOW | VSYNC signal is active low.
|
◆ R_PDC_Open()
Powers on PDC, handles required initialization described in the hardware manual.
Implements capture_api_t::open.
The Open function provides initial configuration for the PDC module. It powers on the module and enables the PCLKO output and the PIXCLK input. Further initialization requires the PIXCLK input to be running in order to be able to reset the PDC as part of its initialization. This clock is input from a camera module and so the reset and further initialization is performed in capture_api_t::captureStart. This function should be called once prior to calling any other PDC API functions. After the PDC is opened the Open function should not be called again without first calling the Close function.
Example:
- Return values
-
| FSP_SUCCESS | Initialization was successful. |
| FSP_ERR_ASSERTION | One or more of the following parameters is NULL
- p_cfg is NULL
- p_api_ctrl is NULL
- The pointer to the transfer interface in the p_cfg parameter is NULL
- Callback parameter is NULL.
- Invalid IRQ number assigned
|
| FSP_ERR_INVALID_ARGUMENT | One or more of the following parameters is incorrect
- bytes_per_pixel is zero
- x_capture_pixels is zero
- y_capture_pixels is zero
- x_capture_start_pixel + x_capture_pixels is greater than 4095, OR
- y_capture_start_pixel + y_capture_pixels is greater than 4095
|
| FSP_ERR_ALREADY_OPEN | Module is already open. |
◆ R_PDC_Close()
Stops and closes the transfer interface, disables and powers off the PDC, clears internal driver data and disables interrupts.
Implements capture_api_t::close.
- Return values
-
| FSP_SUCCESS | Successful close. |
| FSP_ERR_ASSERTION | p_api_ctrl is NULL |
| FSP_ERR_NOT_OPEN | Open has not been successfully called. |
◆ R_PDC_CaptureStart()
Starts a capture. Enables interrupts.
Implements capture_api_t::captureStart.
Sets up the transfer interface to transfer data from the PDC into the specified buffer. Configures the PDC settings as previously set by the capture_api_t::open API. These settings are configured here as the PIXCLK input must be active for the PDC reset operation. When a capture is complete the callback registered during capture_api_t::open API call will be called.
Example:
assert(FSP_SUCCESS == err);
- Return values
-
| FSP_SUCCESS | Capture start successful. |
| FSP_ERR_ASSERTION | One or more of the following parameters is NULL
- p_api_ctrl is NULL
- p_buffer is NULL
|
| FSP_ERR_NOT_OPEN | Open has not been successfully called. |
| FSP_ERR_IN_USE | PDC transfer is already in progress. |
| FSP_ERR_TIMEOUT | Reset operation timed out. |
| FSP_ERR_NOT_INITIALIZED | Callback function has not been set |
◆ R_PDC_StatusGet()
Provides the pdc operating status.
Implements capture_api_t::statusGet.
- Return values
-
| FSP_SUCCESS | Initialization was successful. |
| FSP_ERR_ASSERTION | One or more parameters is NULL. |
| FSP_ERR_NOT_OPEN | Open has not been successfully called. |
◆ R_PDC_CallbackSet()
Updates the user callback and has option of providing memory for callback structure.
Implements capture_api_t::callbackSet.
- Return values
-
| FSP_ERR_UNSUPPORTED | This is just a stub at present |