Functions
fsp_err_t	R_SCI_I2C_Open (i2c_master_ctrl_t const p_ctrl, i2c_master_cfg_t const const p_cfg)

fsp_err_t	R_SCI_I2C_Close (i2c_master_ctrl_t *const p_ctrl)

fsp_err_t	R_SCI_I2C_Read (i2c_master_ctrl_t const p_ctrl, uint8_t const p_dest, uint32_t const bytes, bool const restart)

fsp_err_t	R_SCI_I2C_Write (i2c_master_ctrl_t const p_ctrl, uint8_t const p_src, uint32_t const bytes, bool const restart)

fsp_err_t	R_SCI_I2C_Abort (i2c_master_ctrl_t *const p_ctrl)

fsp_err_t	R_SCI_I2C_SlaveAddressSet (i2c_master_ctrl_t *const p_ctrl, uint32_t const slave, i2c_master_addr_mode_t const addr_mode)

fsp_err_t	R_SCI_I2C_CallbackSet (i2c_master_ctrl_t const p_ctrl, void(p_callback)(i2c_master_callback_args_t ), void const const p_context, i2c_master_callback_args_t *const p_callback_memory)

fsp_err_t	R_SCI_I2C_StatusGet (i2c_master_ctrl_t const p_ctrl, i2c_master_status_t p_status)

Detailed Description

Driver for the SCI peripheral on RZ microprocessor. This module implements the I2C Master Interface.

Overview

The Simple I2C master on SCI HAL module supports transactions with an I2C Slave device. Callbacks must be provided which would be invoked when a transmission or reception has been completed. The callback arguments will contain information about the transaction status, bytes transferred and a pointer to the user defined context.

Features

Supports multiple transmission rates
- Standard Mode Support with up to 100 kHz transaction rate.
- Fast Mode Support with up to 400 kHz transaction rate.
SDA Delay in nanoseconds can be specified as a part of the configuration.
I2C Master Read from a slave device.
I2C Master Write to a slave device.
Abort any in-progress transactions.
Set the address of the slave device.
Non-blocking behavior is achieved by the use of callbacks.
Additional build-time features
- Optional (build time) DMAC support for read and write respectively.
- Optional (build time) support for 10-bit slave addressing.

Configuration

Build Time Configurations for r_sci_i2c

The following build time configurations are defined in fsp_cfg/r_sci_i2c_cfg.h:

Configuration	Options	Default	Description
Parameter Checking	Default (BSP) Enabled Disabled	Default (BSP)	If selected code for parameter checking is included in the build.
DMAC on Transmission and Reception	Enabled Disabled	Disabled	If enabled, DMAC instances will be included in the build for both transmission and reception. Even if enabled, DMAC is not used without adding DMAC driver.
10-bit slave addressing	Enabled Disabled	Disabled	If enabled, the driver will support 10-bit slave addressing mode along with the default 7-bit slave addressing mode.
Multiplex Interrupt	Enabled Disabled	Disabled	Enable multiplex interrupt for a single driver.

Configurations for Connectivity > I2C Master (r_sci_i2c)

This module can be added to the Stacks tab via New Stack > Connectivity > I2C Master (r_sci_i2c).

Configuration	Options	Default	Description
Name	Name must be a valid C symbol	g_i2c0	Module name.
Channel	Value must be an integer between 0 and 5	0	Select the SCI channel. Do not select the safety channel when using DMAC.
Slave Address	Value must be a hex value	0x00	Specify the slave address.
Address Mode	7-Bit 10-Bit	7-Bit	Select the address mode.
Rate	Standard Fast-mode	Standard	Select the I2C data rate. If the requested transfer rate cannot be achieved, the settings with the largest possible transfer rate that is less than or equal to the requested transfer rate are used. The theoretical calculated transfer rate and SDA delay are printed in a comment in the generated sci_i2c_extended_cfg_t structure.
SDA Output Delay (nano seconds)	Must be a valid non-negative integer with maximum configurable value of 300	300	Specify the SDA output delay in nanoseconds.
Noise Filter Clock Select	The on-chip baud rate generator source clock divided by 1 The on-chip baud rate generator source clock divided by 2 The on-chip baud rate generator source clock divided by 4 The on-chip baud rate generator source clock divided by 8	The on-chip baud rate generator source clock divided by 1	Select the on-chip baud rate generator source clock division setting for the digital noise filter
Clock Source	SCInASYNCCLK PCLKM	SCInASYNCCLK	Select the clock source for the SCI I2C module.
Bit Rate Modulation	Enable Disable	Enable	Enabling bitrate modulation reduces the percent error of the actual bitrate with respect to the requested baud rate. It does this by modulating the number of cycles per clock output pulse, so the clock is no longer a square wave.
Callback	Name must be a valid C symbol	sci_i2c_master_callback	A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
Interrupt Priority Level	MCU Specific Options		Select the interrupt priority level. This is set for TXI, RXI (if used), TEI interrupts.
RX Interrupt Priority Level [Only used when DMAC is enabled]	MCU Specific Options		Select the interrupt priority level. This is set for RXI only when DMAC is enabled.

Clock Configuration

The actual I2C transfer rate can be derived from either SCInASYNCCLK or the peripheral clock (PCLKM), and will be calculated and set by the tooling depending on the selected transfer rate.

Pin Configuration

The SCI I2C peripheral module uses pins on the MCU to communicate to external devices. I/O pins must be selected and configured as required by the external device. An I2C channel would consist of two pins - SDA and SCL for data/address and clock respectively.

Usage Notes

Interrupt Configuration

Receive buffer full (RXI), transmit buffer empty (TXI) and transmit end (TEI) interrupts for the selected channel used must be enabled in the properties of the selected device.
Set equal priority levels for all the interrupts mentioned above. Setting the interrupts to different priority levels could result in improper operation.

SCI I2C Master Rate Calculation

The configuration editor calculates the internal baud-rate setting based on the configured transfer rate. The closest possible baud-rate that can be achieved (less than or equal to the requested rate) at the current clock settings is calculated and used.

Enabling DMAC with the SCI I2C

DMAC transfer support is configurable and is disabled from the build by default. SCI I2C driver provides two DMAC instances for transmission and reception respectively.
DMAC is helpful for minimizing interrupts during large transactions. Many I2C applications have shorter transactions. These applications will likely not see any improvement with DMAC. I2C often runs at a much slower speed than the CPU core clock. Some applications with longer transactions may prefer servicing the interrupts at the I2C bitrate to the overhead of bringing in the DMAC driver.
DMAC activation is not available for safety channel.
For further details on DMAC please refer Direct Memory Access Controller (r_dmac)

Multiple Devices on the Bus

A single SCI I2C instance can be used to communicate with multiple slave devices on the same channel by using the SlaveAddressSet API.

Restart

SCI I2C can hold the the bus after an I2C transaction by issuing a repeated start condition.

Examples

Basic Example

This is a basic example of minimal use of the r_sci_i2c in an application. This example shows how this driver can be used for basic read and write operations.

void basic_example (void)
{
    fsp_err_t err;
    uint32_t  i;
    uint32_t  timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    /* Initialize the I2C module */
    err = R_SCI_I2C_Open(&g_i2c_device_ctrl_1, &g_i2c_device_cfg_1);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Write some data to the transmit buffer */
    for (i = 0; i < I2C_BUFFER_SIZE_BYTES; i++)
    {
        g_i2c_tx_buffer[i] = (uint8_t) i;
    }
    /* Send data to I2C slave */
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    err = R_SCI_I2C_Write(&g_i2c_device_ctrl_1, &g_i2c_tx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    handle_error(err);
    /* Since there is nothing else to do, block until Callback triggers*/
    while ((I2C_MASTER_EVENT_TX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
        R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
        timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
        __BKPT(0);
    }
    /* Read data back from the I2C slave */
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    timeout_ms           = I2C_TRANSACTION_BUSY_DELAY;
    err = R_SCI_I2C_Read(&g_i2c_device_ctrl_1, &g_i2c_rx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    handle_error(err);
    /* Since there is nothing else to do, block until Callback triggers*/
    while ((I2C_MASTER_EVENT_RX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
        R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
        timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
        __BKPT(0);
    }
    /* Verify the read data */
    if (0U != memcmp(g_i2c_tx_buffer, g_i2c_rx_buffer, I2C_BUFFER_SIZE_BYTES))
    {
        __BKPT(0);
    }
}

Multiple Slave devices on the same channel (bus)

This example demonstrates how a single SCI I2C driver can be used to communicate with different slave devices which are on the same channel.

void single_channel_multi_slave (void)
{
    fsp_err_t err;
    uint32_t  timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    err = R_SCI_I2C_Open(&g_i2c_device_ctrl_2, &g_i2c_device_cfg_2);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Clear the receive buffer */
    memset(g_i2c_rx_buffer, '0', I2C_BUFFER_SIZE_BYTES);
    /* Read data from I2C slave */
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    err = R_SCI_I2C_Read(&g_i2c_device_ctrl_2, &g_i2c_rx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    handle_error(err);
    while ((I2C_MASTER_EVENT_RX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
        R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
        timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
        __BKPT(0);
    }
    /* Send data to I2C slave on the same channel */
    err = R_SCI_I2C_SlaveAddressSet(&g_i2c_device_ctrl_2, I2C_SLAVE_DISPLAY_ADAPTER, I2C_MASTER_ADDR_MODE_7BIT);
    handle_error(err);
    g_i2c_tx_buffer[0]   = (uint8_t) I2C_EXAMPLE_DATA_1;
    g_i2c_tx_buffer[1]   = (uint8_t) I2C_EXAMPLE_DATA_2;
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    timeout_ms           = I2C_TRANSACTION_BUSY_DELAY;
    err = R_SCI_I2C_Write(&g_i2c_device_ctrl_2, &g_i2c_tx_buffer[0], 2U, false);
    handle_error(err);
    while ((I2C_MASTER_EVENT_TX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
        R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
        timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
        __BKPT(0);
    }
}

Data Structures
struct	sci_i2c_clock_settings_t

struct	sci_i2c_instance_ctrl_t

struct	sci_i2c_extended_cfg_t

Enumerations
enum	sci_i2c_clock_source_t

Data Structure Documentation

◆ sci_i2c_clock_settings_t

struct sci_i2c_clock_settings_t

I2C clock settings

Data Fields
bool	bitrate_modulation	Bit-rate Modulation Function enable or disable.
uint8_t	brr_value	Bit rate register settings.
uint8_t	clk_divisor_value	Clock Select settings.
uint8_t	mddr_value	Modulation Duty Register settings.
uint8_t	cycles_value	SDA Delay Output Cycles Select.
uint8_t	snfr_value	Noise Filter Setting Register value.
sci_i2c_clock_source_t	clock_source	Clock source (PCLKM or SCInASYNCCLK)

◆ sci_i2c_instance_ctrl_t

struct sci_i2c_instance_ctrl_t

I2C control structure. DO NOT INITIALIZE.

◆ sci_i2c_extended_cfg_t

struct sci_i2c_extended_cfg_t

SCI I2C extended configuration

Data Fields
sci_i2c_clock_settings_t	clock_settings	I2C Clock settings.

Enumeration Type Documentation

◆ sci_i2c_clock_source_t

enum sci_i2c_clock_source_t

SCI clock source

Function Documentation

◆ R_SCI_I2C_Open()

fsp_err_t R_SCI_I2C_Open	(	i2c_master_ctrl_t *const	p_ctrl,
		i2c_master_cfg_t const *const	p_cfg
	)

Opens the I2C device.

Return values

FSP_SUCCESS	Device opened without issue.
FSP_ERR_ALREADY_OPEN	Module is already open.
FSP_ERR_ASSERTION	Parameter check failure due to one or more reasons below: p_ctrl or p_cfg is NULL. extended parameter is NULL. Clock rate requested is greater than 400KHz. Invalid IRQ number assigned. Invalid clock setting assigned. If p_transfer_rx is not NULL, p_transfer_tx is NULL.
FSP_ERR_INVALID_ARGUMENT	Invalid input parameter.

◆ R_SCI_I2C_Close()

fsp_err_t R_SCI_I2C_Close ( i2c_master_ctrl_t *const p_ctrl )

Closes the I2C device. Power down I2C peripheral.

This function will safely terminate any in-progress I2C transfer with the device. If a transfer is aborted, the user will be notified via callback with an abort event. Since the callback is optional, this function will also return a specific error code in this situation.

Return values

FSP_SUCCESS	Device closed without issue.
FSP_ERR_ASSERTION	The parameter p_ctrl is NULL.
FSP_ERR_NOT_OPEN	Device was not even opened.

◆ R_SCI_I2C_Read()

fsp_err_t R_SCI_I2C_Read	(	i2c_master_ctrl_t *const	p_ctrl,
		uint8_t *const	p_dest,
		uint32_t const	bytes,
		bool const	restart
	)

Performs a read from the I2C device. The caller will be notified when the operation has completed (successfully) by an I2C_MASTER_EVENT_RX_COMPLETE in the callback.

Return values

FSP_SUCCESS	Function executed without issue.
FSP_ERR_ASSERTION	The parameter p_ctrl, p_dest, p_callback is NULL, bytes is 0.
FSP_ERR_NOT_OPEN	Device was not even opened.

◆ R_SCI_I2C_Write()

fsp_err_t R_SCI_I2C_Write	(	i2c_master_ctrl_t *const	p_ctrl,
		uint8_t *const	p_src,
		uint32_t const	bytes,
		bool const	restart
	)

Performs a write to the I2C device.

This function will fail if there is already an in-progress I2C transfer on the associated channel. Otherwise, the I2C write operation will begin. When no callback is provided by the user, this function performs a blocking write. Otherwise, the write operation is non-blocking and the caller will be notified when the operation has finished by an I2C_EVENT_TX_COMPLETE in the callback.

Return values

FSP_SUCCESS	Function executed without issue.
FSP_ERR_ASSERTION	p_ctrl, p_src, p_callback is NULL.
FSP_ERR_NOT_OPEN	Device was not even opened.

◆ R_SCI_I2C_Abort()

fsp_err_t R_SCI_I2C_Abort ( i2c_master_ctrl_t *const p_ctrl )

Aborts any in-progress transfer and forces the I2C peripheral into a ready state.

This function will safely terminate any in-progress I2C transfer with the device. If a transfer is aborted, the user will be notified via callback with an abort event. Since the callback is optional, this function will also return a specific error code in this situation.

Return values

FSP_SUCCESS	Transaction was aborted without issue.
FSP_ERR_ASSERTION	p_ctrl is NULL.
FSP_ERR_NOT_OPEN	Device was not even opened.

◆ R_SCI_I2C_SlaveAddressSet()

fsp_err_t R_SCI_I2C_SlaveAddressSet	(	i2c_master_ctrl_t *const	p_ctrl,
		uint32_t const	slave,
		i2c_master_addr_mode_t const	addr_mode
	)

Sets address and addressing mode of the slave device.

This function is used to set the device address and addressing mode of the slave without reconfiguring the entire bus.

Return values

FSP_SUCCESS	Address of the slave is set correctly.
FSP_ERR_ASSERTION	p_ctrl is NULL.
FSP_ERR_NOT_OPEN	Device was not even opened.
FSP_ERR_IN_USE	An I2C Transaction is in progress.

◆ R_SCI_I2C_CallbackSet()

fsp_err_t R_SCI_I2C_CallbackSet	(	i2c_master_ctrl_t *const	p_ctrl,
		void()(i2c_master_callback_args_t )	p_callback,
		void const *const	p_context,
		i2c_master_callback_args_t *const	p_callback_memory
	)

Updates the user callback and has option of providing memory for callback structure. Implements i2c_master_api_t::callbackSet

Return values

FSP_SUCCESS	Callback updated successfully.
FSP_ERR_ASSERTION	A required pointer is NULL.
FSP_ERR_NOT_OPEN	The control block has not been opened.

◆ R_SCI_I2C_StatusGet()

fsp_err_t R_SCI_I2C_StatusGet	(	i2c_master_ctrl_t *const	p_ctrl,
		i2c_master_status_t *	p_status
	)

Provides driver status.

Return values

FSP_SUCCESS	Status stored in p_status.
FSP_ERR_ASSERTION	NULL pointer.

Functions

Detailed Description

Overview

Features

Configuration

Build Time Configurations for r_sci_i2c

Configurations for Connectivity > I2C Master (r_sci_i2c)

Clock Configuration

Pin Configuration

Usage Notes

Interrupt Configuration

SCI I2C Master Rate Calculation

Enabling DMAC with the SCI I2C

Multiple Devices on the Bus

Restart

Examples

Basic Example

Multiple Slave devices on the same channel (bus)

Data Structures

Enumerations

Data Structure Documentation

◆ sci_i2c_clock_settings_t

◆ sci_i2c_instance_ctrl_t

◆ sci_i2c_extended_cfg_t

Enumeration Type Documentation

◆ sci_i2c_clock_source_t

Function Documentation

◆ R_SCI_I2C_Open()

◆ R_SCI_I2C_Close()

◆ R_SCI_I2C_Read()

◆ R_SCI_I2C_Write()

◆ R_SCI_I2C_Abort()

◆ R_SCI_I2C_SlaveAddressSet()

◆ R_SCI_I2C_CallbackSet()

◆ R_SCI_I2C_StatusGet()